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Visitor
Visitor
14,236 Views
Registered: ‎11-27-2013

[Memdata 28-96] Could not find a BMM_INFO_DESIGN property in the design. Could not generate the merged BMM file.

Hi all,

We have upgraded to vivado 2013.3 from Planahead 14.5. I decided to give a try to the "Block design" for my Microblaze system instantiation. Everything was working fine in my local test project (synthesis/implementation/bitstream and export to SDK...) .

 

Then comes the time to merge my "Block design" to the main project. I copied the "/bd/" folder to the main project and use the regular "Add Sources" menu and "Existing block design" option.

 

The block design is there, but after synthesis/implementation of the main project ,there is this error :

[Memdata 28-96] Could not find a BMM_INFO_DESIGN property in the design. Could not generate the merged BMM file.

 

And this Critical Warning :

[Memdata 28-122] data2mem failed with a parsing error. Check the bmm file or the bmm_info_* properties on the BRAM components. The design BRAM components initialization strings have not been updated.

 

Thoses errors doens't help at all since there is 90 block rams in the projects from 4 different peoples.

I just want to make sure my part (the block design) is fine.

Both , the main project and my local project are fine separatly.

 

I tried to re-Generate Block Design from the main project.

I tried to manually add the BMM I found in the /bd/ folder with the "Add source" button.

I tried resetting all the runs and re-synthesis/implementation.

 

Any help is greatly appreciated!

Thx

 

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18 Replies
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Scholar
Scholar
14,220 Views
Registered: ‎09-05-2011

Hi,

 

This is a known issue, and a change request has been filed for this issue.

 

This is due to a label being used with the generate statement. For example:

 

generate


  //if(PIPE_SIM_MODE == "FALSE") begin //This works

vs.  
  if(PIPE_SIM_MODE == "FALSE") begin : gt_top // This doesn't work

 

Remove the label and check.

 

Regards,

Highlighted
Visitor
Visitor
14,211 Views
Registered: ‎11-27-2013

You are right,

I removed the generate and that solved the problem.

Thx!

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Highlighted
Scholar
Scholar
14,209 Views
Registered: ‎09-05-2011

Hi, 

 

Please mark  "Accept as solution" if the information provided was helpful.

 

Regards,

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Newbie
Newbie
13,940 Views
Registered: ‎02-13-2014

Hi,

we have the same issue, but all of our block RAM etc is generated from vivado IP.

It is a simple microblaze project on an Artix 7 100T device.

I cannot see where I can remove any label.

Please let me know if there is any other workaround for this issue as it is stopping our development.

 

Thank you

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Visitor
Visitor
13,696 Views
Registered: ‎02-05-2013

I am also seeing this issue with a block memory instantiated in my own IP. No generate statement used. Vivado 2013.4
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Anonymous
Not applicable
13,693 Views

Can you make sure that the word "microblaze" is not in the project hierarchy? For example, font name your block diagram, or EDK submodule "microblaze_0" for example.
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Visitor
Visitor
13,659 Views
Registered: ‎04-01-2014

I have similar trouble with IP component 'microblaze_mcs' instance. Renaming IP does not help. There is detailed problem description : I am using AC701 board for my experiments as prototype. My design contains instance of 'microblaze_mcs' IP. There is small standalone software, I build it using SDK, it starts well under SDK enviroment. But when I am trying to initialize ROM in my Vivado project I get to cases : 1. If I added only ELF file to proect (and associate it to MCS instance, of course) all necessary implementation steps (including bitstream generation) completed successfully, but my software (already debugged using SDK) actually does not start in hardware. It seems to me that BRAMs stays blank, so no code could be started. 2. If I added 'system_bd.bmm' file to my project (to tell Vivado software that design contains some ROMs and it is necessary to update their locations after routing stage) - I get the same error as described earlier :

[Memdata 28-96] Could not find a BMM_INFO_DESIGN property in the design. Could not generate the merged BMM file.

My question is : how to fix this problem?

 

Regards,

Jury

 

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Highlighted
Observer
Observer
9,787 Views
Registered: ‎07-23-2014

Hello All,

 

Can somebody please help on this issue regarding the failure in generating BMM file. My design is realized on Microzed board on Vivado 2014.3.1. The bitstream file is generated but the error comes as well. Is this error harmful?

 

I could also not find where to find this generate statement? which file?????

 

 

Anyone???  

Tags (3)
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Adventurer
Adventurer
8,401 Views
Registered: ‎12-10-2014

I'm getting this error with vivado 2015.2

so it looks like it still hasn't been fixed, but the strange thing is the bit file works fine so it

looks like a false error;

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Anonymous
Not applicable
6,388 Views

Hey guys.  This issue can be seen under the following conditions:

the string 'microblaze' is used as the bd name

bd is added as OOC / DCP / netlist /edif file

if the bram controller is connected to an external bram

if a custom IP contestingif  memory with a bram interface is connected to bram controller

if the microblaze_0_local_memory is renamed

if there is an IP between the bram controller and bram

 

if you have any of the set ups below let me know and I'll post a script to workaround this

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Participant
Participant
6,307 Views
Registered: ‎02-16-2015

Hi All, May I know exactly wheres the location or directories to make the necessary amendments, I am stuck at this issues for almost a week now! Thanks in advance, Sam
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Anonymous
Not applicable
6,290 Views

Hey,

 

Can you comment of you have one of the set-ups seen in my previous thread. this issue can occur for a number of reason. Can you describe your project?

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Highlighted
Visitor
Visitor
6,204 Views
Registered: ‎12-13-2013

Hi Stephen,

 

I've a design where I'm seeing this (in 2015.2). You've identified 6 possible causes:

 

  1. the string 'microblaze' is used as the bd name
  2. bd is added as OOC / DCP / netlist /edif file
  3. if the bram controller is connected to an external bram
  4. if a custom IP contestingif  memory with a bram interface is connected to bram controller
  5. if the microblaze_0_local_memory is renamed
  6. if there is an IP between the bram controller and bram

 

I've fixed (1) and (5). I never had (3), (4) or (6).

 

That leaves (2). I am importing the microblaze processor system as a DCP (built with an older Vivado version that understands XMP / MHS files).

 

I've tried various manual assigments of BMM_INFO_DESIGN and use of write_bmm with no joy.

 

Do you have any suggestions for working around (2)?

 

Thanks!

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Anonymous
Not applicable
6,175 Views

I have a script you can use to generate the mmi file manually (attached). to use this source the TCL (source write_mmi.tcl), then run the command write_mmi <BRAM name>

 

the BRAM name can be obtained from the BD

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Scholar
Scholar
5,318 Views
Registered: ‎11-21-2013

Hey all,

 

I have a similar problem described here:

 

https://forums.xilinx.com/t5/Embedded-Processor-System-Design/BMM-file-is-not-generated-after-migrating-from-2015-2-to-2016-4/td-p/753572

 

Is there anything you can suggest?

 

Thank you

Vlad

Vladislav Muravin
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Highlighted
4,977 Views
Registered: ‎06-13-2017

Hi

I'm getting this error in Vivado 2017.1 doing the advance embedded tutorial for Zynq lab 4. Even though it shows the error message, the bit file is generated so can I assume it's a false flag?

 

Thank you

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Highlighted
Observer
Observer
2,898 Views
Registered: ‎08-11-2018

hello, I have the "if the bram controller is connected to an external bram", and get the error 28-96.

How can I fix it?

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Highlighted
2,333 Views
Registered: ‎10-21-2018

I'm getting the above error and i have the situation "if a custom IP contestingif  memory with a bram interface is connected to bram controller" How can i solve? 

thank you

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