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Registered: ‎06-03-2019

Memory read error at 0xF800615C. Invalid DAP IDCODE. Invalid DAP ACK value: 0

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Hello everyone,

I'm currently using Xilinx Vivado 2018.2 - Windows, with a custom board by Trenz TE0720 having the ZynQ 7000 SoC.

I'm getting the above mentioned error everytime with a different address. Initally the project works fine, but once this error occurs, it keeps occuring no matter what I change. Following is the SDK log:


20:16:56 INFO : Connected to target on host '127.0.0.1' and port '3121'.
20:16:57 INFO : Jtag cable 'Digilent JTAG-HS2 210249A73460' is selected.
20:16:57 INFO : 'jtag frequency' command is executed.
20:16:57 INFO : Sourcing of 'C:/Xilinx/test_board1/vivado/test_board.sdk/zsys_wrapper_hw_platform_0/ps7_init.tcl' is done.
20:16:57 INFO : 'targets -set -filter {jtag_cable_name =~ "Digilent JTAG-HS2 210249A73460" && level==0} -index 1' command is executed.
20:16:58 INFO : FPGA configured successfully with bitstream "C:/Xilinx/test_board1/vivado/test_board.sdk/zsys_wrapper_hw_platform_0/zsys_wrapper.bit"
20:16:58 INFO : Context for 'APU' is selected.
20:16:58 INFO : Hardware design information is loaded from 'C:/Xilinx/test_board1/vivado/test_board.sdk/zsys_wrapper_hw_platform_0/system.hdf'.
20:16:58 INFO : 'configparams force-mem-access 1' command is executed.
20:16:58 INFO : Context for 'APU' is selected.
20:16:58 INFO : 'stop' command is executed.
20:16:58 ERROR : Memory read error at 0xF80060F0. Invalid DAP IDCODE. Invalid DAP ACK value: 0
20:16:58 INFO : ----------------XSDB Script----------------
connect -url tcp:127.0.0.1:3121
source C:/Xilinx/test_board1/vivado/test_board.sdk/zsys_wrapper_hw_platform_0/ps7_init.tcl
targets -set -filter {jtag_cable_name =~ "Digilent JTAG-HS2 210249A73460" && level==0} -index 1
fpga -file C:/Xilinx/test_board1/vivado/test_board.sdk/zsys_wrapper_hw_platform_0/zsys_wrapper.bit
targets -set -nocase -filter {name =~"APU*" && jtag_cable_name =~ "Digilent JTAG-HS2 210249A73460"} -index 0
loadhw -hw C:/Xilinx/test_board1/vivado/test_board.sdk/zsys_wrapper_hw_platform_0/system.hdf -mem-ranges [list {0x40000000 0xbfffffff}]
configparams force-mem-access 1
targets -set -nocase -filter {name =~"APU*" && jtag_cable_name =~ "Digilent JTAG-HS2 210249A73460"} -index 0
stop
ps7_init
----------------End of Script----------------

Is this a software or a hardware fault? What is the cause of this error?

I have already tried the following possible solutions:
1. The JTAG cable is not shaky, it's properly connected.
2. When I delete the entire .sdk folder and remake the project, it may or may not work in new sdk project created.

Please help me find a solution to this problem.

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DAP_IDCODE_error.PNG
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1 Solution

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1,424 Views
Registered: ‎06-03-2019

Hello @abouassi,

I had tried that solution before but it didn't help. Turns out that the problem was the current limit setting of my power supply. I had set it to 500mA which was not enough at startup for the FPGA to work. After setting it to 1A, I have never encountered this problem.

Thank you for your suggestion!

Best regards,

Pramod

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6 Replies
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1,493 Views
Registered: ‎06-03-2019

I have attached a comparison of SDK logs of when the program works and when it doesn't. The error log is always the same. As we can see the FPGA is configured successfully and the hardware information is loaded before the error occurs. I guess this rules out the possibility of a fault JTAG connection.The 'ps7_init' command not getting executed is what seems to be the first difference.

 

Error_log_comparison.PNG
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Moderator
Moderator
1,441 Views
Registered: ‎03-25-2019

HI @leo_skadoosh23,

Could you please try to reduce the JTAG frequency and check if there is any difference.

freq.png

Best regards,
Abdallah
-------------------------------------------------------------------------------
Please don't forget to reply, kudo and accept as a solution
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Highlighted
1,425 Views
Registered: ‎06-03-2019

Hello @abouassi,

I had tried that solution before but it didn't help. Turns out that the problem was the current limit setting of my power supply. I had set it to 500mA which was not enough at startup for the FPGA to work. After setting it to 1A, I have never encountered this problem.

Thank you for your suggestion!

Best regards,

Pramod

View solution in original post

Highlighted
365 Views
Registered: ‎07-25-2019

i am unable to see

please help

11.png
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Highlighted
364 Views
Registered: ‎07-25-2019

Invalid DAP ACK value: 4 is coming

12.png
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Highlighted
359 Views
Registered: ‎07-25-2019

frequency is not highlighting 

13.png
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