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Observer billbracken
Observer
2,693 Views
Registered: ‎11-15-2013

MicroBlaze Peripheral Addresses

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When a PLB peripherl is added to a MicroBlaze in XPS, the default addresses seem to have bit 31 of the address always set to one.  Also, the size of the peripheral's address defaults to 64kb.

 

- Is there a sepcific reason why the peripheral addresses are where they are and the size is 64kb?

 

- Do the PLB periphals have to be located at an address above 0x80000000?

 

- Does the PLB perhipal address range have to be 64kb?

 

I understand that the address range obviously needs to be large enough to support the peripheral, but requiring 64kb of address space for a UART seems extreme... unless it has something to do with how the PLB address peripherals?

 

Thanks in advance,

bb

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Observer billbracken
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3,491 Views
Registered: ‎11-15-2013

Re: MicroBlaze Peripheral Addresses

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Thank you for your response.

 

bb

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2007

Re: MicroBlaze Peripheral Addresses

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Hi,

 

I am not sure as why the default size of address was set to 64kb; However your understanding of addressing range being capable of supporting the peripheral is correct.

 

The address of the peripheral need not be above 0x80000000. For Microblaze, usually we follow the address space as shown here. http://wiki.altium.com/display/ADOH/MicroBlaze+Memory+Space. Starting from 0x0000050 the hierarchy is usually Internal Memory --> External Memory --> External Peripherals.

 

The peripheral address need not be 64kb all the time. Again it depends on the user registers in the given peripheral.

 

--Hem

 

 

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Observer billbracken
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3,492 Views
Registered: ‎11-15-2013

Re: MicroBlaze Peripheral Addresses

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Thank you for your response.

 

bb

View solution in original post

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