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Visitor abi01shek
Visitor
9,020 Views
Registered: ‎10-11-2010

Open SPARC EDK project

I am trying to implement open SPARC on ML605 board. I have manually synthesized the code using ISE 12.2 and have generated an NGC file. I am trying to run an edk project which comes along with the source files. This EDK project was created for ISE 11.3. i thought that xps would automatically update but am getting the following error message


ERROR:EDK:3413 - Error(s) were encountered while updating your project.
ERROR:EDK:3346 - Can not open project due to revup failure.

and the edk project doesnt open. any help is appreciated. :)

 

Abishek

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13 Replies
Xilinx Employee
Xilinx Employee
9,005 Views
Registered: ‎08-08-2007

Re: Open SPARC EDK project

If I understand the Open SPARC kit correctly, Open SPARC will need to be an ISE project.  How does your Open SPARC design relate to an EDK design?

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Visitor abi01shek
Visitor
8,969 Views
Registered: ‎10-11-2010

Re: Open SPARC EDK project

Hey,

The open SPARC contains number of verilog modules that are synthesized by ISE to get a ngc file. Only the core of the open SPARC is synthesized. The next step is to generate a bitstream and to download it into an fpga board so that we can test it.

 

The Open SPARC does not have verilog files that enable communication with the various peripherals present on the board such as UART, memory etc. inorder to enable communication with these peripherals, an edk project "system.xps" comes along with OpenSPARC. This EDK prooject has a microblaze processor that helps with communication with the above mentioned peripherals, hence the ngc file that is genereated by the ise is attached with the edk project  and a bitstream is genereated

 

My problem is that the edk project that comes along with open SPARC was created for xilinx xps 10.1 but i am running xps 12.2. i try to open the edk project in xilinx xps 12.2 it shows the above mentioned error. kindly guide me as to what to do

 

also if you want more information on the edk project please refer the design and verification document that comes along with opensparc 

 


Thanks :)

Abishek

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Xilinx Employee
Xilinx Employee
8,955 Views
Registered: ‎08-08-2007

Re: Open SPARC EDK project

Thanks for the clarification about the OpenSPARC project.  It sounds like the maintainers of the OpenSPARC project need to update the EDK design that they ship.  The revup failures will happen if cores that existed in the 10.1 version no longer exist in the 12.2 version.  In particular, it looks like OPB cores were used were are no longer delivered in 12.1.

Visitor abi01shek
Visitor
8,912 Views
Registered: ‎10-11-2010

Re: Open SPARC EDK project

thanks for the reply. i will generate the bitstream in Xilinx 10.1.

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Visitor abi01shek
Visitor
8,906 Views
Registered: ‎10-11-2010

Re: Open SPARC EDK project

I generated the ngc file for XC5VLX110T using xilinx 10.1. i used the -all option. synthesized for 4 thread, 16 tlb and no spu configuration.

i then followed the procedure in the DV guide and connected the sparc.ngc to the edk project. I generated the bitstream as mentioned in the DV guide.

I then tried running the default diagnostic - bypass_win. I followed the steps as mentioned in the DV guide but I could not connect to the microblaze microprocessor debugging module using XMD.


connect mb mdm showed connection failure error. kindly help me out in this regard.

 

thanks :)

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Xilinx Employee
Xilinx Employee
8,881 Views
Registered: ‎08-08-2007

Re: Open SPARC EDK project

I am not familiar with the OpenSPARC flow but XMD connection failures almost always are a result of bad clocks and / or resets.

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Visitor abi01shek
Visitor
8,840 Views
Registered: ‎10-11-2010

Re: Open SPARC EDK project

hey,

 

i found that the opb bus is not offered anymore in ISE 12. what can be used as a substitute? how to solve this bus obsoleted problem?

 

thanks

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Visitor abi01shek
Visitor
8,840 Views
Registered: ‎10-11-2010

Re: Open SPARC EDK project

hey,

 

i found that the opb bus is not offered anymore in ISE 12. what can be used as a substitute? how to solve this bus obsoleted problem?

 

thanks

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Xilinx Employee
Xilinx Employee
8,829 Views
Registered: ‎08-08-2007

Re: Open SPARC EDK project

You are correct about the OPB cores being no longer available.  I do not know what the maintainers of OpenSPARC are planning but the system needs to be redesigned to use the cores that are currently available.

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Visitor anandraman
Visitor
3,916 Views
Registered: ‎03-03-2011

Re: Open SPARC EDK project

hi all,

 

i need a help regarding openSparc t1 processor.

 

My aim is to implement one core of the OpenSparc processor into the Xilinx FPGA.

 

I have downloaded and extracted the openSPARCT1.1.7.tar.bz2 and openSPARCt1.1.5.tar.bz2

 

Could you please tell me how can i download the RTL code of 1 core into FPGA using Xilinx.

 

Please explain step by step so that a begineer like me can understand it properly

 

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Visitor rachavidya
Visitor
3,766 Views
Registered: ‎07-07-2011

Re: Open SPARC EDK project

Wow, i'm working on it now

When I've had the answers, I'd like to share it here 

Wish me luck

:D

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3,689 Views
Registered: ‎04-20-2012

Re: Open SPARC EDK project

Hi,

 

I am also trying to implement the OpenSPARCT1 1.7 on my Xilinx FPGA XC5VLX110T. My aim is to run either the Single core 1-Thread or 4-Thread on FPGA and then boot the Solaris OS.

I am trying ot run the EDK Project already defined and along with the default Synplicity generated netlist. But I am unable to generate the bit-stream.

If you have already completed your project, could you please share some information with me?

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3,688 Views
Registered: ‎04-20-2012

Re: Open SPARC EDK project

Hey, are you succesful with your SPARC Implementation?

Is it possible to run OpenSPARC EDK Project directly on FPGA by simply using the pre-defined EDK Project along with Synplicity generated net-list, without implementing the simulation and synthesis as described in the DV_guide?

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