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Observer jpc2112
Observer
3,330 Views
Registered: ‎06-05-2017

OpenCV design example for ZC706 using 2016.4 Vivado/HLS and SDK

I've found OpenCV design examples for the ZC702 kit but I'm looking specifically for my ZC706 kit.  Basically I need something like XAPP1167 but updated for the ZC706 hardware platform and preferably for a newer software version, I am using 2016.4 now.  I don't want any examples for SDSoC cuz I don't have that, it's gotta be SDK.  Can anyone point me to an existing OpenCV project to help me learn?

Thanks.

 

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9 Replies
Observer jpc2112
Observer
3,322 Views
Registered: ‎06-05-2017

OpenCV design example for ZC706 using 2016.4 Vivado/HLS and SDK

p.s. I'm running my Xilinx s/w on Win10 so I'm looking for an example project that doesn't assume I am on Linux OS.

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Xilinx Employee
Xilinx Employee
3,309 Views
Registered: ‎09-22-2015

Re: OpenCV design example for ZC706 using 2016.4 Vivado/HLS and SDK

XAPP1167 although uses ZC702 board as an example is targeted towards ZYNQ-7000 in general and you should be able to export the design to a ZC706 project. Also, in the XAPP1167, change the project manager settings in Vivado to ZC706 and create bitstream should work. Pleas use the constraints section in the user guide to make appropriate pin connection changes.

 

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_3/ug895-vivado-system-level-design-entry.pdf

 

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Observer jpc2112
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3,280 Views
Registered: ‎06-05-2017

Re: OpenCV design example for ZC706 using 2016.4 Vivado/HLS and SDK

Hi Akshayva, I need to work in baby steps as I'm not a Vivado expert yet.  First I'll tell you what I've managed to do on my own with the existing XAPP1167 tutorial.

I copied the downloaded XAPP1167_2014.4 project folder and then renamed it to XAPP1167_2016.4 so to not confuse it with the original, due to making the following careful changes to certain .tcl files and to the xapp1167_windows.bat file in the project root:

I searched and replaced all instances of 2014.4 to 2016.4 in these files because I have 2016.4 installed.  I have verified that I can use this version with the ZC706 board and BIST tutorial.

 

I then followed the steps starting on page 11 of XAPP1167, "Steps to Accelerate an OpenCV Application" by doing the batch file option to get a HLS command prompt.

 

I then performed Step 1 on all the example designs and all ran with success, generating the output images as expected.  So at this point I think my setup is good.  Attached is the console output from running "make csim" on the erode design example.

 

But then on Step 2 I got a fatal error, probably due to the design expecting a Xilinx opencv directory structure same as 2014.4 install.  It can't locate "libavcodec/avcodec.h" (first error encountered).  Also attached is the console output from running "make elf" on the erode design example.

 

The above steps still assume I have a ZC702 board but I wasn't intending to program my ZC706 board with the final bitstream and boot file, I was just going through the process for now.

 

So at this point I'm stuck.  I would like to try your advice of exporting this ZC702 erode project to a ZC706 project, however I'm confused over exactly what that means.  Was there a Vivado project automatically created from Step 1 that I need to open and then use the Export feature?  Or did it create a HLS project, or SDK project?  I would like to switch over to using the tool environment rather than command line based.  I see Step 1 created a prj folder under erode folder and there's a file called "vivado_hls.app", is this basically my HLS erode project that I need to open?

 

Thanks for your replies.

 

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Observer jpc2112
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3,206 Views
Registered: ‎06-05-2017

Re: OpenCV design example for ZC706 using 2016.4 Vivado/HLS and SDK

Re-reading Step 2, it says "To cross-build ARM applications on host, the ARM GNU tools must be installed. The ARM GNU tools are included with the Xilinx Software Development Kit (SDK)." Maybe this is the problem, but then why weren't these tools installed with my SDK?
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Xilinx Employee
Xilinx Employee
3,169 Views
Registered: ‎09-22-2015

Re: OpenCV design example for ZC706 using 2016.4 Vivado/HLS and SDK

Hi,

     Are you adding SYSROOT to your SDK environment? Please add the sysroot to your environment and set the -L and -l as well as -I for compiler toolchain using the C/C++ settings. Regarding adding sysroot, please read this SDK help page:

 

https://www.xilinx.com/html_docs/xilinx2017_3/SDK_Doc/SDK_tasks/sdk_t_create_new_linux_appln.html?hl=sysroot

 

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Xilinx Employee
Xilinx Employee
3,168 Views
Registered: ‎09-22-2015

Re: OpenCV design example for ZC706 using 2016.4 Vivado/HLS and SDK

ARM GNU toolchain is always installed with SDK. It is what SDK uses to build any application. What you are missing is include path and the library path.
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Observer jpc2112
Observer
3,137 Views
Registered: ‎06-05-2017

Re: OpenCV design example for ZC706 using 2016.4 Vivado/HLS and SDK

Forgive me but you've lost me.  I don't know where my Linux system root is.  I'm on Windows 10 not Linux.  You say to add this to my SDK environment but that's my first question, what's generating my SDK environment for this XAPP, something I'm supposed to create from scratch or by importing?  The XAPP just says "make" this and "make" that, no gui environment.


Your link takes me to a new SDK project setup tutorial page for Linux application, I notice that using this option rather than standalone project I don't have the ability to select my hardware platform of ZC706 so this also confuses me.

 

My goals are twofold, 1) convert this 2014.4 XAPP1167 project into a 2016.4 Vivado/HLS/SDK project, and 2) get some form of it working with the ZC706 board so I can experiment running real-time OpenCV routines in C/HLS by reading .avi from the SD or taking in live HDMI.

 

How would I MIGRATE the original XAPP1167 project into a SDK/Vivado project for 2016.4? If there was a project file to IMPORT like .xpr/.ppr/.xise that would make sense to me, but I don't see anything.

 

I'm posing this question to the community--has anyone done this already?


I'm at a disadvantage by trying to find help on an outdated toolset and a flow I'm not experienced with. (My last real experience was with ISE and Virtex2, designing in pure VHDL.  I'm thumbing through XAPPSs and UGs in vain).
Thanks.

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Observer jpc2112
Observer
3,118 Views
Registered: ‎06-05-2017

Re: OpenCV design example for ZC706 using 2016.4 Vivado/HLS and SDK

I managed to stumble across the project.tcl script in the hardware/vivado/scripts folder and ran this in 2016.4, which produced an error but the log file gave me proper instructions for what to do which was to first run the script in Vivado 2014.4 (which I had to download and install), then reopen the generated zynq_base_trd_2014.4.xpr project in 2016.4 and then run Report IP Status.

 

All of this worked but when I reported IP status it gave the recommendations to upgrade each IP but the actual Upgrade Selected button was disabled.  If the IP is locked, how do I unlock it?  I'm looking at chapter 2 of UG896 and have not found a reason explaining what I'm experiencing.

 

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Visitor imadmed@fp
Visitor
2,739 Views
Registered: ‎12-19-2017

Re: OpenCV design example for ZC706 using 2016.4 Vivado/HLS and SDK

did you find the solution for this problem?


@jpc2112 wrote:

Hi Akshayva, I need to work in baby steps as I'm not a Vivado expert yet.  First I'll tell you what I've managed to do on my own with the existing XAPP1167 tutorial.

I copied the downloaded XAPP1167_2014.4 project folder and then renamed it to XAPP1167_2016.4 so to not confuse it with the original, due to making the following careful changes to certain .tcl files and to the xapp1167_windows.bat file in the project root:

I searched and replaced all instances of 2014.4 to 2016.4 in these files because I have 2016.4 installed.  I have verified that I can use this version with the ZC706 board and BIST tutorial.

 

I then followed the steps starting on page 11 of XAPP1167, "Steps to Accelerate an OpenCV Application" by doing the batch file option to get a HLS command prompt.

 

I then performed Step 1 on all the example designs and all ran with success, generating the output images as expected.  So at this point I think my setup is good.  Attached is the console output from running "make csim" on the erode design example.

 

But then on Step 2 I got a fatal error, probably due to the design expecting a Xilinx opencv directory structure same as 2014.4 install.  It can't locate "libavcodec/avcodec.h" (first error encountered).  Also attached is the console output from running "make elf" on the erode design example.

 

The above steps still assume I have a ZC702 board but I wasn't intending to program my ZC706 board with the final bitstream and boot file, I was just going through the process for now.

 

So at this point I'm stuck.  I would like to try your advice of exporting this ZC702 erode project to a ZC706 project, however I'm confused over exactly what that means.  Was there a Vivado project automatically created from Step 1 that I need to open and then use the Export feature?  Or did it create a HLS project, or SDK project?  I would like to switch over to using the tool environment rather than command line based.  I see Step 1 created a prj folder under erode folder and there's a file called "vivado_hls.app", is this basically my HLS erode project that I need to open?

 

Thanks for your replies.

 


 

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