cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
Adventurer
Adventurer
6,480 Views
Registered: ‎11-11-2015

Petalinux 2016.4 I2C problem

Jump to solution

Custom board using a Zynq 7020 that has been running for a while after being configured with ISE 14. Upgrading to Vivado and PetaLinux 2016.4 and I2C doesn't seem to be working.

Running Linux, writing to the I2C registers using dev/mem. Register addresses obtained from 

https://www.xilinx.com/support/documentation/ip_documentation/axi_iic/v1_02_a/axi_iic_ds756.pdf , this flow is the same flow that has been working with the ISE built core and firmware. Using a base address of 0x40001000 as can be seen in the dts snippet below.

I reset the I2C software by writing the reset key to the soft reset register.

I write to the control register to enable the AXI IIC controller

I write data to the Transmit FIFO register

At this point normally I would see data on my I2C bus but with my new Vivado core I see nothing. Both the data and clk lines are pulled low. I have verified that the MIO pins are correct in the Vivado project (same as the ISE settings), and I have verified that I have the pullup enabled on the clk and data lines.

My device tree node for I2C is shown below, this is taken from the plnx_arm-system.dts. I am using I2c 1. Any thoughts on why my I2C isn't working?

 

    i2c@e0004000 {
            compatible = "cdns,i2c-r1p10";
            status = "disabled";
            clocks = <0x1 0x26>;
            interrupt-parent = <0x3>;
            interrupts = <0x0 0x19 0x4>;
            reg = <0xe0004000 0x1000>;
            #address-cells = <0x1>;
            #size-cells = <0x0>;
        };

        i2c@e0005000 {
            compatible = "cdns,i2c-r1p10";
            status = "okay";
            clocks = <0x1 0x27>;
            interrupt-parent = <0x3>;
            interrupts = <0x0 0x30 0x4>;
            reg = <0xe0005000 0x1000>;
            #address-cells = <0x1>;
            #size-cells = <0x0>;
            clock-frequency = <0x61a80>;
        };

0 Kudos
1 Solution

Accepted Solutions
Highlighted
Voyager
Voyager
9,275 Views
Registered: ‎06-24-2013

Hey @mashman,

 

... which is why there is no interrupt information for that node in my dts ...

According to the devicetree bindings for the Linux kernel, the interrupts are a required property.

You also showed the section with an interrupts entry in your post ...

 

I haven't checked if the driver works without or even registers without but I would suggest to enable device debugging and see what it reports during probe. A good idea is to make it a module instead of building it into the kernel, but that's not the problem here.

 

Hope this helps,

Herbert

-------------- Yes, I do this for fun!

View solution in original post

0 Kudos
21 Replies
Highlighted
Voyager
Voyager
6,468 Views
Registered: ‎06-24-2013

Hey @mashman,

 

My device tree node for I2C is shown below, this is taken from the plnx_arm-system.dts.

Any thoughts on why my I2C isn't working?

Device trees can be tricky and there have been quite some changes over time, so my bet would be on a bad configuration.

 

Do you happen to have the kernel bootup log or the complete dmesg output?

 

Thanks in advance,

Herbert

-------------- Yes, I do this for fun!
0 Kudos
Highlighted
Moderator
Moderator
6,423 Views
Registered: ‎09-12-2007

The devicetree generated by the devicetree generator in petalinux, (or whereever you are using it) will use the HDF file. For this reason, only IP on the FPGA will have their nodes added. It wont create the nodes for the devices connected to the phy, or in your case the nodes added to the i2c.

 

You would need to add these manually. 

0 Kudos
Highlighted
Adventurer
Adventurer
6,407 Views
Registered: ‎11-11-2015

Hi @hpoetzl

Thanks for your reply. I attached my boot log and dmesg output. The only messages relevant to I2C I see in the bootlog are (with the same messages in the dmesg output)

 

i2c /dev entries driver

cdns-i2c e0005000.i2c: 400 kHz mmio e0005000 irq 141

 

 Also if I look in my dev directory I do see an entry for I2c-0, but I still just see my I2C lines pulled low. Any ideas?

0 Kudos
Highlighted
Adventurer
Adventurer
6,402 Views
Registered: ‎11-11-2015

@stephenm

thanks for the reply. What do you mean by nodes added to the i2c? On my board my i2c signals go to a DAC, which would not need to be added to the device tree?

0 Kudos
Highlighted
Voyager
Voyager
6,393 Views
Registered: ‎06-24-2013

Hey @mashman,

 

You need to add a device tree entry similar to this to your device tree:

IIC: i2c@81600000 {
    compatible = "xlnx,xps-iic-2.00.a";
    interrupt-parent = <&xps_intc_0>;
    interrupts = < 6 2 >;
    reg = < 0x81600000 0x10000 >;
    xlnx,clk-freq = <0x5f5e100>;
    xlnx,family = "virtex5";
    xlnx,gpo-width = <0x1>;
    xlnx,iic-freq = <0x186a0>;
    xlnx,scl-inertial-delay = <0x0>;
    xlnx,sda-inertial-delay = <0x0>;
    xlnx,ten-bit-adr = <0x0>;
 
    #address-cells = <1>;
    #size-cells = <0>;
 
    m24c08@50 {
        compatible = "at,24c08";
        reg = <0x50>;
    };
} ;

Note that this is just copied from the Xilinx Wiki Page, so it will need to be adapted to your case.

 

Specifically you want to check/change the interrupt and register settings as well as the xlnx,* settings and add your DAC instead of the m24c08@50 (but that's not required to get the bus working).

 

Hope this helps,

Herbert

-------------- Yes, I do this for fun!
Highlighted
Adventurer
Adventurer
6,383 Views
Registered: ‎11-11-2015

@hpoetzl

Thanks for that. I'm a bit confused when I look at my plnx_arm-system.dts. I have the entries for i2c which I included in my first post, these are in the amba section

 

Then there is an amba_pl section which contains an entry for i2c similar to what you posted, Why would there be these multiple i2c entries? Do I need to modify the amba_pl entry? Thanks for the help.

 

 

amba_pl {
        #address-cells = <0x1>;
        #size-cells = <0x1>;
        compatible = "simple-bus";
        ranges;

        i2c@40001000 {
            #address-cells = <0x1>;
            #size-cells = <0x0>;
            clock-names = "ref_clk";
            clocks = <0x1 0xf>;
            compatible = "xlnx,xps-iic-2.00.a";
            reg = <0x40001000 0x1000>;
        };

        

0 Kudos
Highlighted
Voyager
Voyager
6,380 Views
Registered: ‎06-24-2013

Hey @mashman,

 

The entries you listed are for the PS I2C controller peripherial, not for the AXI IIC controller.

I.e. they Zynq has two hardened I2C controllers accessible from the Processing System (PS).

Those are listed with one enabled and the other disabled, which is also what your Linux kernel sees.

The AXI IIC controller is not listed there yet, so you need to add it to make it work.

 

Hope this clarifies,

Herbert

-------------- Yes, I do this for fun!
0 Kudos
Highlighted
Adventurer
Adventurer
6,378 Views
Registered: ‎11-11-2015

@hpoetzl

Thanks again, I haven't worked much with these dts files. What about the i2c entry in the amba_pl section in my last post? Isn't that for the AXI iic controller? Or do I need to add an entry in the amba section as well?

0 Kudos
Highlighted
Voyager
Voyager
6,372 Views
Registered: ‎06-24-2013

What about the i2c entry in the amba_pl section in my last post?

Sorry, I completely missed that one ...

 

Isn't that for the AXI iic controller?

Yes, this looks like an entry for the AXI IIC controller.

 

Or do I need to add an entry in the amba section as well?

No, adapting that one to your situation should be enough, but make sure the AXI IIC controller driver is present in the kernel

 

Hope this helps,

Herbert

-------------- Yes, I do this for fun!
0 Kudos
Highlighted
Adventurer
Adventurer
6,353 Views
Registered: ‎11-11-2015

@hpoetzl

Thanks again,

If I boot and run i2cdetect -l  I see

i2c-0  i2c   Cadence I2C at e0005000   I2c adapter

 

In the Xilinx Wiki link you posted it shows xiic-i2c

 

So to me it looks like that Axi IIC controller is still not there, although I did enable it in the kernel configuration and I do see that entry in my dts.

0 Kudos
Highlighted
Voyager
Voyager
6,351 Views
Registered: ‎06-24-2013

Hey @mashman,

 

So to me it looks like that Axi IIC controller is still not there ...

This is very likely to be the case, let's check the kernel boot log again for evidence of the driver probing.

 

Best,

Herbert

-------------- Yes, I do this for fun!
Highlighted
Adventurer
Adventurer
6,347 Views
Registered: ‎11-11-2015

@hpoetzl

I've pasted the boot log below, followed by the results of i2cdetect -l

 

The only i2c messages I see in the log are

i2c /dev entries driver
cdns-i2c e0005000.i2c: 400 kHz mmio e0005000 irq 141

 

Interesting because I went into the kernel config and explicitly disabled the Cadence I2c driver and enabled the Xilinx controller and then did a petalinux-build.

 

 


root@plnx_arm:~# root
-sh: root: command not found
root@plnx_arm:~# root
-sh: root: command not found
root@plnx_arm:~# reboot -n

Broadcast message from root@plnx_arm (ttyPS0) (Mon Aug 28 15:14:40 2017):

The system`Z.HÖ+ËëÖë
                    ÖK®¬ë
                         êêUR¨H¨(Ê*
¡¥¹¢½?±Ù±é²j?Ê*                    u¥Ñ
ÍÍ?¢¡¢I5¥¹±5jRüroot@plnx_arm:~# Stopping Dropbear SSH server: stopped /usr/sbin/dropbear (pid 898)
dropbear.
Stopping system message bus: dbus.
Stopping syslogd/klogd: stopped syslogd (pid 904)
stopped klogd (pid 907)
done
Stopping tcf-agent:
root@plnx_arm:~# clear


root@plnx_arm:~# reboot -n
þeboot: Restarting system
Begin Instron Custom - CDAT and LED GPIO

Enter SetupCdatFansAndLed

SetupCdatFansAndLed - writing GPIO Dir/Enable

Leave SetupCdatFansAndLed

End Instron Custom - CDAT and LED GPIO


U-Boot 2016.07 (Aug 24 2017 - 15:30:50 -0400)

DRAM:  ECC disabled 1 GiB
MMC:   sdhci@e0100000: 0
SF: Unsupported flash IDs: manuf 00, jedec 0000, ext_jedec 0000
*** Warning - spi_flash_probe() failed, using default environment

## Error: flags type check failure for "serverip" <= "AUTO" (type: i)
himport_r: can't insert "serverip=AUTO" into hash table
In:    serial
Out:   serial
Err:   serial
Net:   ZYNQ GEM: e000b000, phyaddr 7, interface rgmii-id
eth0: ethernet@e000b000
U-BOOT for

ethernet@e000b000 Waiting for PHY auto negotiation to complete....... done
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
BOOTP broadcast 5
BOOTP broadcast 6
BOOTP broadcast 7
BOOTP broadcast 8
BOOTP broadcast 9
BOOTP broadcast 10
BOOTP broadcast 11
BOOTP broadcast 12
BOOTP broadcast 13
BOOTP broadcast 14
BOOTP broadcast 15
BOOTP broadcast 16
BOOTP broadcast 17

Retry time exceeded
Hit any key to stop autoboot:  0
Device: sdhci@e0100000
Manufacturer ID: 28
OEM: 4245
Name:
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 7.5 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
reading image.ub
106130296 bytes read in 8794 ms (11.5 MiB/s)
## Loading kernel from FIT Image at 10000000 ...
   Using 'conf@1' configuration
   Verifying Hash Integrity ... OK
   Trying 'kernel@0' kernel subimage
     Description:  Linux Kernel
     Type:         Kernel Image
     Compression:  uncompressed
     Data Start:   0x100000d4
     Data Size:    3563144 Bytes = 3.4 MiB
     Architecture: ARM
     OS:           Linux
     Load Address: 0x00008000
     Entry Point:  0x00008000
     Hash algo:    sha1
     Hash value:   73dbb436529d6cc5da6a4399532979ab3776ba3d
   Verifying Hash Integrity ... sha1+ OK
## Loading ramdisk from FIT Image at 10000000 ...
   Using 'conf@1' configuration
   Trying 'ramdisk@0' ramdisk subimage
     Description:  ramdisk
     Type:         RAMDisk Image
     Compression:  uncompressed
     Data Start:   0x10369c10
     Data Size:    102550392 Bytes = 97.8 MiB
     Architecture: ARM
     OS:           Linux
     Load Address: unavailable
     Entry Point:  unavailable
     Hash algo:    sha1
     Hash value:   4da7fa85de891f84eb392c07325d6c429fef4229
   Verifying Hash Integrity ... sha1+ OK
## Loading fdt from FIT Image at 10000000 ...
   Using 'conf@1' configuration
   Trying 'fdt@0' fdt subimage
     Description:  Flattened Device Tree blob
     Type:         Flat Device Tree
     Compression:  uncompressed
     Data Start:   0x10366050
     Data Size:    15118 Bytes = 14.8 KiB
     Architecture: ARM
     Hash algo:    sha1
     Hash value:   b507c61a01354e530cadf84932da6cf5062595a4
   Verifying Hash Integrity ... sha1+ OK
   Booting using the fdt blob at 0x10366050
   Loading Kernel Image ... OK
   Loading Ramdisk to 01e33000, end 07fffb78 ... OK
   Loading Device Tree to 01e2c000, end 01e32b0d ... OK

Starting kernel ...

Booting Linux on physical CPU 0x0
Linux version 4.6.0-xilinx (instron@minint-65lmcmb.instron.com) (gcc version 5.2.1 20151005 (Linaro GCC 5.2-2015.11-2) ) #1 SMP PREEMPT Mon Aug 28 11:03:21 EDT 2017
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine model: Ave2_peta
cma: Reserved 16 MiB at 0x33c00000
Memory policy: Data cache writealloc
percpu: Embedded 12 pages/cpu @ef93b000 s19776 r8192 d21184 u49152
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 214528
Kernel command line: console=ttyPS0,115200 mem=844M
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 731352K/864256K available (5277K kernel code, 204K rwdata, 1676K rodata, 1024K init, 218K bss, 116520K reserved, 16384K cma-reserved, 61440K highmem)
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
    vmalloc : 0xf0800000 - 0xff800000   ( 240 MB)
    lowmem  : 0xc0000000 - 0xf0000000   ( 768 MB)
    pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
    modules : 0xbf000000 - 0xbfe00000   (  14 MB)
      .text : 0xc0008000 - 0xc07ca410   (7946 kB)
      .init : 0xc0800000 - 0xc0900000   (1024 kB)
      .data : 0xc0900000 - 0xc09333e0   ( 205 kB)
       .bss : 0xc09333e0 - 0xc0969fa4   ( 219 kB)
Preemptible hierarchical RCU implementation.
        Build-time adjustment of leaf fanout to 32.
        RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=2
NR_IRQS:16 nr_irqs:16 16
efuse mapped to f0800000
slcr mapped to f0802000
L2C: platform modifies aux control register: 0x72360000 -> 0x72760000
L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000
L2C-310 erratum 769419 enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 ID prefetch enabled, offset 1 lines
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001
zynq_clock_init: clkc starts at f0802100
Zynq clock init
sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns
clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce07af025, max_idle_ns: 440795209040 ns
Switching to timer-based delay loop, resolution 3ns
clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 537538477 ns
timer #0 at f080a000, irq=17
Console: colour dummy device 80x30
Calibrating delay loop (skipped), value calculated using timer frequency.. 666.66 BogoMIPS (lpj=3333333)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
CPU: Testing write buffer coherency: ok
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x100000 - 0x100058
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
Brought up 2 CPUs
SMP: Total of 2 processors activated (1333.33 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
cpuidle: using governor menu
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0xf0880000
zynq-pinctrl 700.pinctrl: zynq pinctrl initialized
vgaarb: loaded
SCSI subsystem initialized
pps_core: LinuxPPS API ver. 1 registered
pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
PTP clock support registered
EDAC MC: Ver: 3.0.0
Advanced Linux Sound Architecture Driver Initialized.
clocksource: Switched to clocksource arm_global_timer
NET: Registered protocol family 2
TCP established hash table entries: 8192 (order: 3, 32768 bytes)
TCP bind hash table entries: 8192 (order: 4, 65536 bytes)
TCP: Hash tables configured (established 8192 bind 8192)
UDP hash table entries: 512 (order: 2, 16384 bytes)
UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
Trying to unpack rootfs image as initramfs...
Freeing initrd memory: 100148K (c1e33000 - c8000000)
hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
futex hash table entries: 512 (order: 3, 32768 bytes)
workingset: timestamp_bits=28 max_order=18 bucket_order=0
jffs2: version 2.2. (NAND) (SUMMARY)  © 2001-2006 Red Hat, Inc.
bounce: pool size: 64 pages
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
dma-pl330 f8003000.dmac: Loaded driver for PL330 DMAC-241330
dma-pl330 f8003000.dmac:        DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16
xilinx-vdma 40004000.dma: unable to request IRQ 0
xilinx-vdma 40004000.dma: Xilinx AXI VDMA Engine Driver Probed!!
e0000000.serial: ttyPS1 at MMIO 0xe0000000 (irq = 144, base_baud = 3125000) is a xuartps
e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 145, base_baud = 3125000) is a xuartps
console [ttyPS0] enabled
xdevcfg f8007000.devcfg: ioremap 0xf8007000 to f0872000
[drm] Initialized drm 1.1.0 20060810
brd: module loaded
loop: module loaded
m25p80 spi0.0: SPI transfer timed out
m25p80 spi0.0: error -110 reading 9f
m25p80: probe of spi0.0 failed with error -110
CAN device driver interface
gpiod_set_value: invalid GPIO
libphy: MACB_mii_bus: probed
macb e000b000.ethernet eth0: Cadence GEM rev 0x00020118 at 0xe000b000 irq 147 (00:0a:35:00:1e:53)
Marvell 88E1116R e000b000.etherne:07: attached PHY driver [Marvell 88E1116R] (mii_bus:phy_addr=e000b000.etherne:07, irq=-1)
e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
mousedev: PS/2 mouse device common for all mice
i2c /dev entries driver
cdns-i2c e0005000.i2c: 400 kHz mmio e0005000 irq 141
EDAC MC: ECC not enabled
Xilinx Zynq CpuIdle Driver started
sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
sdhci-pltfm: SDHCI platform and OF driver helper
mmc0: SDHCI controller on e0100000.sdhci [e0100000.sdhci] using DMA
ledtrig-cpu: registered to indicate activity on CPUs
NET: Registered protocol family 10
sit: IPv6 over IPv4 tunneling driver
NET: Registered protocol family 17
can: controller area network core (rev 20120528 abi 9)
NET: Registered protocol family 29
can: raw protocol (rev 20120528)
can: broadcast manager protocol (rev 20120528 t)
can: netlink gateway (rev 20130117) max_hops=1
Registering SWP/SWPB emulation handler
hctosys: unable to open rtc device (rtc0)
mmc0: new high speed SDHC card at address b368
ALSA device list:
  No soundcards found.
mmcblk0: mmc0:b368       7.46 GiB
Freeing unused kernel memory: 1024K (c0800000 - c0900000)
INIT:  mmcblk0: p1
version 2.88 booting
FAT-fs (mmcblk0p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck.
random: dd urandom read with 2 bits of entropy available
Mon Aug 28 15:11:31 UTC 2017
Starting internet superserver: inetd.
INIT: Entering runlevel: 5
Configuring network interfaces... IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
done.
Starting system message bus: dbus.
Starting Dropbear SSH server: Generating key, this may take a while...
Public key portion is:
ssh-rsa AAAAB3NzaC1yc2EAAAADAQABAAABAQDFJLEPeXq9oiQHgjQic99luyO1f3oC19o2smBnefPnzQY3lxlSu1wOxf38lqv+LBySE4ZYQvNys/Yi88KiuDq4gE+XxVFwIeH4if4ei71mUqsZ5P5iIMTeOGxxAHpQBDi0+Ya8xeIiwTaMg/OuNWx8FNaFZhTMXOvS53tuTAmW1tACh9dp417u7g3CLgbiJRxjfXqE0Hy6AcLAs13oUIlXFkS8y9h/Lku52gUZ9uPLC58CRysmcYlUqbCDtL0dfGQGgcmOhhILLd5rMeKshAZGXZcTO6fiUB31DInV9bX1PMFB4EJirOsvcSx4BheKcYPs+ui8gINyP9BluRyQxK/n root@plnx_arm
Fingerprint: md5 19:45:a7:64:96:af:68:cc:53:88:76:80:10:4e:9e:a7
dropbear.
Starting syslogd/klogd: done
RUNNING AVE STARTUP
++ echo 2.1.0
++ mount /dev/mmcblk0p1 /mnt
++ cp /mnt/AveServer.elf /tmp/AveServer.elf
++ cd /tmp
++ umount /mnt
Starting tcf-agent: OK

PetaLinux 2016.4 plnx_arm /dev/ttyPS0

plnx_arm login: macb e000b000.ethernet eth0: link up (1000/Full)
IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready

PetaLinux 2016.4 plnx_arm /dev/ttyPS0

plnx_arm login: root
Password:
root@plnx_arm:~# i2cdetect -l
i2c-0   i2c             Cadence I2C at e0005000                 I2C adapter
root@plnx_arm:~#

0 Kudos
Highlighted
Adventurer
Adventurer
6,335 Views
Registered: ‎11-11-2015

In my Vivado design I do not have the interrupt port of the axi_iic block connected, which is why there is no interrupt information for that node in my dts. Could that cause a problem? We are not using interrupts for IIC.

0 Kudos
Highlighted
Voyager
Voyager
9,276 Views
Registered: ‎06-24-2013

Hey @mashman,

 

... which is why there is no interrupt information for that node in my dts ...

According to the devicetree bindings for the Linux kernel, the interrupts are a required property.

You also showed the section with an interrupts entry in your post ...

 

I haven't checked if the driver works without or even registers without but I would suggest to enable device debugging and see what it reports during probe. A good idea is to make it a module instead of building it into the kernel, but that's not the problem here.

 

Hope this helps,

Herbert

-------------- Yes, I do this for fun!

View solution in original post

0 Kudos
Highlighted
Adventurer
Adventurer
6,315 Views
Registered: ‎11-11-2015

@hpoetzl

The interrupt nodes were included with my I2C PS devices, but not with the AXI IIC, I've included my AXI IIC device node in the amba_pl section again, and there are no interrupt properties. I'm new to debugging dts issues..so dumb question, how do I enable debugging for this device?

I will try and modify my design so I connect the interrupt of the AXI IIC and see if this adds the interrupt properties.

 

amba_pl {
        #address-cells = <0x1>;
        #size-cells = <0x1>;
        compatible = "simple-bus";
        ranges;

        i2c@40001000 {
            #address-cells = <0x1>;
            #size-cells = <0x0>;
            clock-names = "ref_clk";
            clocks = <0x1 0xf>;
            compatible = "xlnx,xps-iic-2.00.a";
            reg = <0x40001000 0x1000>;
        };

0 Kudos
Highlighted
Adventurer
Adventurer
6,306 Views
Registered: ‎11-11-2015

Interestingly if I do an ls -l on /sys/firmware/devicetree/base/amba_pl I do see my axi iic device, i2c@40001000.

But it doesn't show up if I run i2cdetect and it doesn't seem to be working.

 Untitled.png

0 Kudos
Highlighted
Adventurer
Adventurer
6,188 Views
Registered: ‎11-11-2015

I now have the axi iic showing up when I run i2c detect, the interrupt property is required in the device tree. In my Vivado project I connected the interrupt line of the AXI IIC to the interrupts of the PS.

0 Kudos
Highlighted
Voyager
Voyager
6,178 Views
Registered: ‎06-24-2013

You're welcome!

 

Best,

Herbert

-------------- Yes, I do this for fun!
Highlighted
Visitor
Visitor
6,106 Views
Registered: ‎12-27-2016

which parameters do you need put in? I have one AXI_I2C controller build in PL, which I can access from Linux kernel build from petalinux 2015.4, but when I port the device tree to buildroot, the kernel couldn't see the AXI_I2C device, I'm trying to figure out what do I missing. -Henry 

0 Kudos
Highlighted
Adventurer
Adventurer
4,720 Views
Registered: ‎11-11-2015

@hpoetzl

Thanks for all of your help here! My IIC now shows up as required. It doesn't seem to be working at the moment but I suspect I  may have a hardware issue or something in my Vivado project. I'm going to keep trying to get this to work properly.

Thanks again

0 Kudos
Highlighted
Adventurer
Adventurer
4,720 Views
Registered: ‎11-11-2015

@hfeng2016

My problem is that my AXI IIC device did not have an interrupt property in the dts. Once I connected the interrupt to the PS interrupt in Vivado the interrupt property was added and my AXI I2C device was seen in the kernel, previously I had the interrupt output of the AXI I2C unconnected.

0 Kudos