10-15-2018 05:41 AM
Hello,
What does this message (pleas, see screenshot below) mean ?
Indeed, there is no such file in the specified location, but Implementation & bitstream generation were run without errors.
Thanks.
10-15-2018 07:40 AM
Hi @pavel_47,
The *.ltx files are generated when you include the ILA in your design. If you have ILA in your design then follow the below steps
1. Open the Synthesized or Netlist Design.
2. Run the write_debug_probes filename.ltx Tcl command.
if you don't have any ILAs in your design then run the below command and check once:
remove_files <file_name.ltx>
Best Regards,
Srikanth
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10-15-2018 07:40 AM
Hi @pavel_47,
The *.ltx files are generated when you include the ILA in your design. If you have ILA in your design then follow the below steps
1. Open the Synthesized or Netlist Design.
2. Run the write_debug_probes filename.ltx Tcl command.
if you don't have any ILAs in your design then run the below command and check once:
remove_files <file_name.ltx>
Best Regards,
Srikanth
----------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.
10-16-2018 02:11 AM
Hi Savula,
Indeed, there is ILA in my design.
Unfortunately doesn't work
Here is screenshot after executing write_debug_probes command
Here are the strange issues:
10-16-2018 02:34 AM
I hurried up a little with my response: indeed liste of signals in the debug setup became empty for some unexplained raison.
So, I need to remake it.
Now it's ok.
10-16-2018 06:16 AM
The issue repeated but in the opposite sens: now there is no any LA in the design but tool still can't find .ltx file.
Moreover there is no more design_2 ... I deleted it.
I tried remove_files - doesn't work.
10-16-2018 06:39 AM
Well ... the option "Debug probes file" wasn't empty (it was kept since previous session). I cleared it and now it's Ok