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1,084 Views
Registered: ‎04-23-2018

Regarding memory section psu_ddr_1_MEM_0.

hi All,

 

When i am creating an SDK project ,in the linker script we have two memory regions psu_ddr_1_MEM_0, and psu_ddr_0_MEM_0.

 

by default every segment (text,data,bss etc) are in psu_ddr_0_MEM_0, i tried using psu_ddr_1_MEM_0 i am getting below error.

 

"relocation truncated to fit: ............."

 

is it possible to use psu_ddr_1_MEM_0 use in application project. i want to give data segment,heap and stack into psu_ddr_1_MEM_0 ? if possible how ?

 

regards,

sarath

 

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ibaie
Xilinx Employee
Xilinx Employee
1,025 Views
Registered: ‎10-06-2016

Hi sarath@pathpartner,

 

You issue seems to be produced when the .text section is placed on DDR0 and the rest on DDR1, as placing everything on DDR1 works fine for me (helloworld example on ZCU102).

 

I'm not sure about why the linker is not able to complete the linkage but seems to be the fact that it might have some issues reaching the relative addresses in DDR1, as explained in a similar issue posted on stackoverflow. Definitivelly this is a toolchain question not really specific to XIlinx by itself so you can try to find some info for GCC by itself.

 

Regards

Ibai


Ibai
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ibaie
Xilinx Employee
Xilinx Employee
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Registered: ‎10-06-2016

Hi sarath@pathpartner,

Any update on this issue?

Regards
Ibai

Ibai
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