cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
Visitor
Visitor
2,263 Views
Registered: ‎01-22-2013

Regarding to running two elf files on one processor

Hi all,

I'm trying to write a simple program stored in microblaze's local memory to let the processor jump to the main program stored on ddr_sdram.The program stored on the ddr_sdram is the posix_multi_thread demo of xilinx c project.(I use the linker script to make the two program stored in different location)

Thus I have two elf file,and I used xmd to debug.First download the multi-thread program to the microblaze,then download the simple program,and then run the processor.But the result is strange,the simple program containing the jump instruction seemed to run correctly,but the multi-thread program didn't,the thread seemed to be stuck,everything was fine until entering the thread creation.

I had run the both program separately and both runned correctly.I originally doubted that it was owing to the vector.reset and interrupt...ect section of the two program overlapped,but after I separated them manually the problem remained.By the way,if I just test some xil_print function in the main program then there's no problem,the execution will continue from the jump instruction in the first program.Thus I wonder if it's because the xil_kernel or thread initialization failed but still can't figure out the problem.

Can anyone give me some advice on how to find the problem?

many thanks~

and sorry for my bad English

0 Kudos
1 Reply
Highlighted
Visitor
Visitor
2,247 Views
Registered: ‎01-22-2013

After several days of debugging I still have not much progress.Maybe I need to specify my problem more clearly.Now I have two C project in sdk for microblaze0,one is a simple program storing in lmb containing a jump instruction to te other program.The other program is the main program,stored in DDR_SDRAM and I used the Xilkernel POSIX Threads Demo for that.It's strange that I can run both program successfully if runed separately,but if I use the first program to jump to the second one the thread seemed  failed to creat,even the master thread.And I'm sure the second program has started because I have put some print function to see where the program got stucked,it seemed that it stucked after "xilkernel_start()" function.Is it possible result from the two program's .vectors.reset, .vectors.interrupt...ect overlap?

 

Thanks

 

Here is the main function of the first program:

int main()
{

    init_platform();

    print("Microblaze0:\n\r");
    func_ptr = PROG_START_ADDR;
    func_ptr();
    cleanup_platform();

    return 0;

}

The second one is in the attached file

And the following is my .ld file:

(in brief,I stored the first program in lmb and the second one in ddr_sdram)

1.first program

/*******************************************************************/
/* */
/* This file is automatically generated by linker script generator.*/
/* */
/* Version: Xilinx EDK 13.4 EDK_O.87xd */
/* */
/* Copyright (c) 2010 Xilinx, Inc. All rights reserved. */
/* */
/* Description : MicroBlaze Linker Script */
/* */
/*******************************************************************/

_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x400;
_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x400;

/* Define Memories in the system */

MEMORY
{
ilmb_cntlr_0_dlmb_cntlr_0 : ORIGIN = 0x00000050, LENGTH = 0x00001FB0
DDR2_SDRAM_MPMC_BASEADDR : ORIGIN = 0xD8000000, LENGTH = 0x08000000
}

/* Specify the default entry point to the program */

ENTRY(_start)

/* Define the sections, and where they are mapped in memory */

SECTIONS
{
.vectors.reset 0x00000000 : {
*(.vectors.reset)
}

.vectors.sw_exception 0x00000008 : {
*(.vectors.sw_exception)
}

.vectors.interrupt 0x00000010 : {
*(.vectors.interrupt)
}

.vectors.hw_exception 0x00000020 : {
*(.vectors.hw_exception)
}

.text : {
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
} > ilmb_cntlr_0_dlmb_cntlr_0

.init : {
KEEP (*(.init))
} > ilmb_cntlr_0_dlmb_cntlr_0

.fini : {
KEEP (*(.fini))
} > ilmb_cntlr_0_dlmb_cntlr_0

.ctors : {
__CTOR_LIST__ = .;
___CTORS_LIST___ = .;
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__CTOR_END__ = .;
___CTORS_END___ = .;
} > ilmb_cntlr_0_dlmb_cntlr_0

.dtors : {
__DTOR_LIST__ = .;
___DTORS_LIST___ = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
__DTOR_END__ = .;
___DTORS_END___ = .;
} > ilmb_cntlr_0_dlmb_cntlr_0

.rodata : {
__rodata_start = .;
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
__rodata_end = .;
} > ilmb_cntlr_0_dlmb_cntlr_0

.sdata2 : {
. = ALIGN(8);
__sdata2_start = .;
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
. = ALIGN(8);
__sdata2_end = .;
} > ilmb_cntlr_0_dlmb_cntlr_0

.sbss2 : {
__sbss2_start = .;
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
__sbss2_end = .;
} > ilmb_cntlr_0_dlmb_cntlr_0

.data : {
. = ALIGN(4);
__data_start = .;
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
__data_end = .;
} > ilmb_cntlr_0_dlmb_cntlr_0

.got : {
*(.got)
} > ilmb_cntlr_0_dlmb_cntlr_0

.got1 : {
*(.got1)
} > ilmb_cntlr_0_dlmb_cntlr_0

.got2 : {
*(.got2)
} > ilmb_cntlr_0_dlmb_cntlr_0

.eh_frame : {
*(.eh_frame)
} > ilmb_cntlr_0_dlmb_cntlr_0

.jcr : {
*(.jcr)
} > ilmb_cntlr_0_dlmb_cntlr_0

.gcc_except_table : {
*(.gcc_except_table)
} > ilmb_cntlr_0_dlmb_cntlr_0

.sdata : {
. = ALIGN(8);
__sdata_start = .;
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
__sdata_end = .;
} > ilmb_cntlr_0_dlmb_cntlr_0

.sbss : {
. = ALIGN(4);
__sbss_start = .;
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
. = ALIGN(8);
__sbss_end = .;
} > ilmb_cntlr_0_dlmb_cntlr_0

.tdata : {
__tdata_start = .;
*(.tdata)
*(.tdata.*)
*(.gnu.linkonce.td.*)
__tdata_end = .;
} > ilmb_cntlr_0_dlmb_cntlr_0

.tbss : {
__tbss_start = .;
*(.tbss)
*(.tbss.*)
*(.gnu.linkonce.tb.*)
__tbss_end = .;
} > ilmb_cntlr_0_dlmb_cntlr_0

.bss : {
. = ALIGN(4);
__bss_start = .;
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
__bss_end = .;
} > ilmb_cntlr_0_dlmb_cntlr_0

_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );

_SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 );

/* Generate Stack and Heap definitions */

.heap : {
. = ALIGN(8);
_heap = .;
_heap_start = .;
. += _HEAP_SIZE;
_heap_end = .;
} > ilmb_cntlr_0_dlmb_cntlr_0

.stack : {
_stack_end = .;
. += _STACK_SIZE;
. = ALIGN(8);
_stack = .;
__stack = _stack;
} > ilmb_cntlr_0_dlmb_cntlr_0

_end = .;
}

 

 

2.second program

/*******************************************************************/
/* */
/* This file is automatically generated by linker script generator.*/
/* */
/* Version: Xilinx EDK 13.4 EDK_O.87xd */
/* */
/* Copyright (c) 2010 Xilinx, Inc. All rights reserved. */
/* */
/* Description : MicroBlaze Linker Script */
/* */
/*******************************************************************/

_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x800;
_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x800;

/* Define Memories in the system */

MEMORY
{
ilmb_cntlr_0_dlmb_cntlr_0 : ORIGIN = 0x00000050, LENGTH = 0x00001FB0
DDR2_SDRAM_MPMC_BASEADDR : ORIGIN = 0xD8000000, LENGTH = 0x08000000
}

/* Specify the default entry point to the program */

ENTRY(_start)

/* Define the sections, and where they are mapped in memory */

SECTIONS
{
.vectors.reset 0x00000000 : {
*(.vectors.reset)
}

.vectors.sw_exception 0x00000008 : {
*(.vectors.sw_exception)
}

.vectors.interrupt 0x00000010 : {
*(.vectors.interrupt)
}

.vectors.hw_exception 0x00000020 : {
*(.vectors.hw_exception)
}

.text : {
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
} > DDR2_SDRAM_MPMC_BASEADDR

.init : {
KEEP (*(.init))
} > DDR2_SDRAM_MPMC_BASEADDR

.fini : {
KEEP (*(.fini))
} > DDR2_SDRAM_MPMC_BASEADDR

.ctors : {
__CTOR_LIST__ = .;
___CTORS_LIST___ = .;
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__CTOR_END__ = .;
___CTORS_END___ = .;
} > DDR2_SDRAM_MPMC_BASEADDR

.dtors : {
__DTOR_LIST__ = .;
___DTORS_LIST___ = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
__DTOR_END__ = .;
___DTORS_END___ = .;
} > DDR2_SDRAM_MPMC_BASEADDR

.rodata : {
__rodata_start = .;
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
__rodata_end = .;
} > DDR2_SDRAM_MPMC_BASEADDR

.sdata2 : {
. = ALIGN(8);
__sdata2_start = .;
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
. = ALIGN(8);
__sdata2_end = .;
} > DDR2_SDRAM_MPMC_BASEADDR

.sbss2 : {
__sbss2_start = .;
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
__sbss2_end = .;
} > DDR2_SDRAM_MPMC_BASEADDR

.data : {
. = ALIGN(4);
__data_start = .;
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
__data_end = .;
} > DDR2_SDRAM_MPMC_BASEADDR

.got : {
*(.got)
} > DDR2_SDRAM_MPMC_BASEADDR

.got1 : {
*(.got1)
} > DDR2_SDRAM_MPMC_BASEADDR

.got2 : {
*(.got2)
} > DDR2_SDRAM_MPMC_BASEADDR

.eh_frame : {
*(.eh_frame)
} > DDR2_SDRAM_MPMC_BASEADDR

.jcr : {
*(.jcr)
} > DDR2_SDRAM_MPMC_BASEADDR

.gcc_except_table : {
*(.gcc_except_table)
} > DDR2_SDRAM_MPMC_BASEADDR

.sdata : {
. = ALIGN(8);
__sdata_start = .;
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
__sdata_end = .;
} > DDR2_SDRAM_MPMC_BASEADDR

.sbss : {
. = ALIGN(4);
__sbss_start = .;
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
. = ALIGN(8);
__sbss_end = .;
} > DDR2_SDRAM_MPMC_BASEADDR

.tdata : {
__tdata_start = .;
*(.tdata)
*(.tdata.*)
*(.gnu.linkonce.td.*)
__tdata_end = .;
} > DDR2_SDRAM_MPMC_BASEADDR

.tbss : {
__tbss_start = .;
*(.tbss)
*(.tbss.*)
*(.gnu.linkonce.tb.*)
__tbss_end = .;
} > DDR2_SDRAM_MPMC_BASEADDR

.bss : {
. = ALIGN(4);
__bss_start = .;
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
__bss_end = .;
} > DDR2_SDRAM_MPMC_BASEADDR

_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );

_SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 );

/* Generate Stack and Heap definitions */

.heap : {
. = ALIGN(8);
_heap = .;
_heap_start = .;
. += _HEAP_SIZE;
_heap_end = .;
} > DDR2_SDRAM_MPMC_BASEADDR

.stack : {
_stack_end = .;
. += _STACK_SIZE;
. = ALIGN(8);
_stack = .;
__stack = _stack;
} > DDR2_SDRAM_MPMC_BASEADDR

_end = .;
}

 

0 Kudos