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767 Views
Registered: ‎05-10-2018

Update inferred memory using .coe file without resynthesis (Vivado)

Greetings,

 

I have been reading various support replies related to updating block RAM, but am getting bogged down in what is for ISE only, and what will work in Vivado (I am using Vivado).  I have a custom soft processor (not Microblaze) and am using readmemh in Verilog to load a .coe file that I build manually.  All is working, but I must resynthesize the design each time I want to update the firmware.    I have read through documentation for DATA2MEM, but as I see no reference to Vivado (only ISE).  I have also seen a reference to a utility named 'updatemem'.  I'm curious if someone has been down this path and can make a suggestion which direction I should continue my research.

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3 Replies
703 Views
Registered: ‎05-10-2018

Re: Update inferred memory using .coe file without resynthesis (Vivado)

With more research, it appears that in Vivado I would likely want to use the 'WRITEMEM' command.  This command requires a .MMI file that specifies the BRAM location.  Unfortunately, Vivado only puts BRAM information into the .MMI file for BRAM that is instantiated using the block diagram.  My soft processor's RAM is an inferred RAM, and it does not appear in the auto-generated .MMI file.

 

Though the .MMI file is XML, it could be hand-build / modified.  However, as Vivado is implementing my 16-bit wide x 32K program memory as sixteen 1-bit arrays, hand-writing the XML for manually creating a .MMI file is very cumbersome and error prone.

 

Has anyone been down this path, and perhaps found a simpler way to update BRAM for a custom soft processor post-synthesis?

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663 Views
Registered: ‎05-10-2018

Re: Update inferred memory using .coe file without resynthesis (Vivado)

Still stuck on this one... it seems that I need to use the TCL command 'UPDATEMEM' to merge my memory initialization file with a previously generated bitstream.  However, for that I need a .MMI file that describes my memory block.  As the memory block I need to update is instantiated in HDL (and not the IP Integrator Block Diagram Editor) it is not being automatically included in the system-generated .MMI file.  I understand that I can use the TCL command 'WRITE_MMI' to specify a RAM (BRAM) to include in a .MMI, however for that I need the name of the BRAM.  The WRITE_MMI example uses the BRAM name that is within a single block; my RAM is instantiated using 16 BRAMS (each one bit wide) by synthesis, so I am unsure how to format the 'WRITE_MMI' command using the name/location of all 16 BRAM blocks that make up my RAM.  Any advice?

 

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629 Views
Registered: ‎09-12-2007

Re: Update inferred memory using .coe file without resynthesis (Vivado)

Yuou can use updatemem (which replaces data2mem). However, you would need to manually create the mmi.

I have created a wiki and covered this use case (non processor flow)


http://www.wiki.xilinx.com/Understanding+MEMDATA+flow+and+how+to+manually+create+MMI+file
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