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Visitor x-adi
Visitor
1,415 Views
Registered: ‎02-22-2012

Using clock generator core in platform studio

Hello Everyone,

 

I want to get 20 MHz from my 50 MHz oscillator present in my Spartan 3E board. To do this I enter 50MHz as in the input to my Clock generator and 20MHz as the expected output (I am just taking one output form the clock generator)

 

My question:

 

1. The tool is generating bunch of files in HDL folder, synthesis folder, implementation folder. Since the clock generator contains components specific to Spartan 3E architecture, I know it can't be simulated in Xilinx, therefore I am trying to simulate the core in Isim simulator.

 

All I want to do is "Input 50MHz from my board and observe the 20 MHz output using chipscope". After I pass this first step, I want to integrate it in my design.

 

How should I proceed? 

 

Thanks a lot for the help :) 

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