05-06-2014 03:25 AM
I have an issue when adding IP AXI Datamover (v 5.1) to Block Design in Vivado 2014.1. Parameter C_S_AXIS_S2MM_TDATA_WIDTH is read only and set to 32 bits. I need to change it to 64. I have no such issue when just adding IP to design sources from IP Catalog. Screenshot are attached. What can be done?
06-13-2014 04:51 AM
09-10-2014 12:58 AM
we had the same issue, but if you do it correctly in IPI block, then
AFTER VALIDATE the data mover parameters are set correctly by auto
oru core is AXI_Data_Capture, out stream is 64 bit
AXI_Data_Capture >> AXI FIFO >> AXI Data Mover >> axi interconect > PS7 HP0 configured as 64 bit
after validate the 64 bit info is propageted and full path is auto confed to 64 bit
I was about to fail a webcase that there is a bug, but there is none, it just works.
12-09-2015 03:36 AM
It doesn't update the correct size, even after validation or synthesis.
I have a 512 bit bus connected to the datamover s2mm input, but the data width remains stuck at 32 bits. Is there any place where we can set for example the compilation order?
The compiler knows it is wrong, but it doesn't update this "auto" width parameter.
[BD 41-1228] Width mismatch when connecting input pin '/axi_datamover_0/s_axis_s2mm_tdata'(32) to net 's2mm_fifo_dout'(512) - Only lower order bits will be connected, and other input bits of this pin will be left unconnected.
any other trick one can do in order to force this assignment?
12-09-2015 03:40 AM