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7,603 Views
Registered: ‎08-21-2008

XPS MCH EMC 10.1 issue

Hello.

Previously i made a code to read, write and erase a FLASH device (intel strata) in version 9.2 and everythign worked fine.

Now i am using the same FLASH device in another board which has the device  XC5VFX100T FF1136 -1. This has no support in EDK 9.2 so i switched to 10.1 and developed the same code as before.

But now the same code is not working in XPS 10.1.03.

Is there any issue related to EMC controller in 10.1 version.

I am using version 10.1.03. 

 

Please reply as soon as possible. I am stuck due to this. 

Waiting for your valuable inputs. 

Thanks in advance.

Regards,

Prateek. 

Best of luck.
--
Unlimited in my Limits.
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10 Replies
Visitor sachingorkhe
Visitor
7,602 Views
Registered: ‎11-18-2007

Re: XPS MCH EMC 10.1 issue

Hey Pratik,

 

Are you using the any Xilinx dev. board which has Flash and SRAM both are sharing the same Address and Data pins?

 

If so then please confirm whether you are using the both memories on-board?

 

What errors are you getting when trying to write Flash?  

 

Waiting for your reply,

 

Regards,

Sachin 

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7,600 Views
Registered: ‎08-21-2008

Re: XPS MCH EMC 10.1 issue

Hello.

No i am not using any Xilinx development board. I have a customized one. and i am using the FLASH in standalonemode and not sharing it.

 

Regards. 

Best of luck.
--
Unlimited in my Limits.
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Visitor sachingorkhe
Visitor
7,598 Views
Registered: ‎11-18-2007

Re: XPS MCH EMC 10.1 issue

Prateek,

 

Please let me know how are you importing or building your system into PLB with 10.1.03?

 

Try to send your steps followed coz I was also gone thru' same but my flow was opposite i.e. from PLB to OPB.

 

 

R'

Sachin

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7,589 Views
Registered: ‎08-21-2008

Re: XPS MCH EMC 10.1 issue

Buddy let me complete this thing i will definitely let you know.

I have a project on my hands that i have to deliver.

My question stands as it is. Let me solve this first.

 

Regards. 

Best of luck.
--
Unlimited in my Limits.
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7,572 Views
Registered: ‎08-21-2008

Re: XPS MCH EMC 10.1 issue

Hello.

Please if anybody can suggest something regarding my post it willl be hoghly beneficial..

 

Regards. 

Best of luck.
--
Unlimited in my Limits.
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Xilinx Employee
Xilinx Employee
7,569 Views
Registered: ‎08-07-2007

Re: XPS MCH EMC 10.1 issue

Hi,

 

Can you post the error message? Does it fail with CFI query, erasing or programming the Flash?

 

-XF 

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7,566 Views
Registered: ‎08-21-2008

Re: XPS MCH EMC 10.1 issue

Hi.

Thanks for your reply. 

Actually there is no error but the output is not coming from intel FLASH JS28F256 P30 B95. Even the flash device ID is not coming which was coming in version 9.2. Everything is same to same in my code in version 10.1.03 as it was in version 9.2.

its a 16 bit wide flash with capacity 32 MB. 24 Address lines. There is only one flash device i am using.

So accordingly i have calculated the parameters and mapped

MW=32

DW=16

MAW=24

AU=8

AS=1

HAW=32 

EMCs [7:30] <=> FLASH DEVICEs [23:0]

 

I don't know where i am going wrong.

Please suggest some solution.

Is there any bug with EMC of 10.1. 

 

Regards. 

Best of luck.
--
Unlimited in my Limits.
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7,558 Views
Registered: ‎08-21-2008

Re: XPS MCH EMC 10.1 issue

This is the software code i am using...

**************************************************************

 

// This Code is for Read, Write and Erase

#include "xparameters.h"
#include "stdio.h"
#include "xutil.h"
#include "xuartlite_l.h"
#include "xio.h"
//#include "xgpio_l.h"

main()
{
Xuint16 send_emc16;
Xuint16 read_emc16;
Xuint8 read_uart_command,send_emc1,send_emc2,read_emc1,read_emc2;
int i,addr_c,addr_c1,j,l,k,m;
xil_printf("\n\rFlash read write erase\n\r"); 

TmrCtrInit();

while(1)
{
//XGpio_mSetDataReg(0x40000000, 1, 0); // ADV and clk GPIO_0
//Waiting for Command
read_uart_command = XUartLite_RecvByte ( 0x84000000 )  ; // UART

//unlocking blocks
if(read_uart_command == '~')
{
  addr_c = 0x86000000;
  for(i=0;i<4;i++)
     {
        XIo_Out16(addr_c, 0x60);
       XIo_Out16(addr_c, 0xD0);   
udelay(100000);
       XIo_Out16(0x86000000, 0x90);
      read_emc16 = XIo_In16 (0x86000000 + 0x02);
      xil_printf("\n\r0x%x ", read_emc16);
        addr_c = addr_c + 0x4000;
udelay(100000);
    }
    xil_printf("\n\rFINISHED Unblocking\n\r");
}
 
//erasing FLASH
if(read_uart_command == '!')
{
    XIo_Out16(0x86000000, 0x20);
    XIo_Out16(0x86000000, 0xD0);   
xil_printf("\n\rErasing FLASH\n\r"); // all loops below this line are written to provide delay and    
        for(l=0;l<1;l++)   // formatting for ERASE operation only
            { 
              for(j=0;j<6;j++)
                  {
                    for(k=0;k<5;k++)
                        {
                        xil_printf(".");   
udelay(1000000);
                        }
                    xil_printf("\n\b\b\b\b\b");
                  }
            }
    xil_printf("\n\rFINISHED Erasing\n\r");
}



//reading flash
if(read_uart_command == '@')
{
xil_printf("\n\rreading flash\n\r");

addr_c = 0x86000000 ;

//command
for(i=0;i<1000000;i++)
{
  XIo_Out16 (addr_c, 0xFF);
}

// reading logic
for(i=0;i<3000;i++)
{
read_emc16 = XIo_In16 (addr_c);
read_emc1 = read_emc16;
read_emc2 = read_emc16 >> 8;
XUartLite_SendByte (0x84000000, read_emc1);
XUartLite_SendByte (0x84000000, read_emc2);
addr_c = addr_c + 2;
}
}



// writing FLASH
if(read_uart_command == '#')
{
xil_printf("\r\nWriting Flash chip");

addr_c = 0x86000000 ;

for(i=0;i<3000;i++)
{
send_emc1 = XUartLite_RecvByte (0x84000000);
send_emc2 = XUartLite_RecvByte (0x84000000);
send_emc16 = ((send_emc1) | (send_emc2 << 8));
XIo_Out16 (addr_c, 0x40);
XIo_Out16 (addr_c, send_emc16);
addr_c = addr_c + 2;
}
xil_printf("\n\rFINISHED Writing\n\r");
}

//Status register data
if(read_uart_command == '$')
{
xil_printf("\r\nReading Status register data");
//XIo_Out16 (0x86000000, 0x70);
read_emc16 = XIo_In16 (0x86000000 + 0x00000002);
xil_printf("\n\r0x%x ", read_emc16);
}
 
}// end while
}// end main()
 

Best of luck.
--
Unlimited in my Limits.
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Xilinx Employee
Xilinx Employee
7,550 Views
Registered: ‎08-07-2007

Re: XPS MCH EMC 10.1 issue

Shouldn't MW=16, considering that you only have one part in x16 mode?

 

-XF

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2,169 Views
Registered: ‎08-21-2008

Re: XPS MCH EMC 10.1 issue

Yes. Even that also i have tried but the result is the same. Device is not responding at all. According to "MW" being 16,  "AS" will be 0 and mapping will become [8:31] <=> [23:0]... I am unable to understand why it is happening. Do you have any clue?

But you won't believe that on 9.2 version i have used the wrong mapping, i.e. [7:30] <=> [23:0] and everything was working. Strange thing. I am totally confused.

Please provide some solution, if any.

 

Thanks in advance.

Regards. 

Best of luck.
--
Unlimited in my Limits.
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