12-14-2015 02:43 AM
I have a Microblaze system with an Xilinx Uart 16550 connected. The uart is setup with FIFO enabled and 8 byte of threshold.
Reading the manual of uart I expect an ISR when 8 byte has received into the FIFO but this don't happening, I have an ISR at every byte received.
The configuration code of uart is:
XUartNs550_SetBaudRate(UartInstancePtr,baudrate); XUartNs550_WriteReg(UartInstancePtr->BaseAddress,XUN_MCR_OFFSET,0x02); //XUN_MCR_RTS XUartNs550_WriteReg(UartInstancePtr->BaseAddress,XUN_LCR_OFFSET,0x03); //XUN_LCR_8_DATA_BITS & ~XUN_LCR_LENGTH_MASK & ~XUN_LCR_ENABLE_PARITY XUartNs550_WriteReg(UartInstancePtr->BaseAddress,XUN_IER_OFFSET,0x01); //XUN_IER_RX_DATA XUartNs550_WriteReg(UartInstancePtr->BaseAddress,XUN_FCR_OFFSET,0x47); //XUN_FIFO_TRIGGER_08 | XUN_FIFO_ENABLE | XUN_FIFO_RX_RESET | XUN_FIFO_TX_RESET
Can anyone help me?
12-14-2015 08:14 AM
Nowhere do I see a feature to provide an interrupt when the FIFO has 8 characters described in the manual.
12-25-2015 02:05 AM
can you mark this post as solved and also let us know how this problem was solved. this will help out other users