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Anonymous
Not applicable
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ZCU102 PS_ERR_OUT red and VCCOPS light off after power cycle

Hello,

I have seen two ZCU102 boards lately where the PS_ERR_OUT light goes red, and I don't know why. Since it has happened twice now, I figure there must be something wrong with what I am doing. Right now, it remains red after power cycling.

 

My process is typically:

1. Power on board
2. Program FPGA with XSCT console in SDK using a bitstream provided by our HDL team. I have to use the -no-revision-checks flag (this issue is being looked at by HDL team)
3. Use System Debugger to launch Standalone Application debug instance via JTAG. Our application uses FreeRTOS and runs on one of the R5s. In the configuration, I have the "run psu_init", "Reset APU", "Reset RPU", and  "PL powerup" boxes checked.
4. Step through PS source code

I have not programmed anything onto this board outside of the bitstream files, so no FSBL, PMUFW or other images have been programmed.

What I want to know is:

1. How to turn the PS_ERR_OUT light off
2. What am I doing to cause the PS_ERR_OUT light to come on even after power cycling the board in JTAG mode?

Is it possible a badly addressed FPGA register write could cause the PS_ERR_OUT light to come on? The HDL team told me the PL memory map uses addresses 0x8000_0000 - 0x8080_0000, so I have been reading and writing addresses within that range. Whenever I read an address though, the value I read is all 0s.

I have seen the AR about reconfiguring the Maxim Power Controller, however I would like to try other possible solutions first.

Any ideas? I work primarily on the PS, however we migrated from Zynq7000 to UltraScale and now I am running into issues like this that I have not seen before. Thank you for any help!

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Xilinx Employee
Xilinx Employee
684 Views
Registered: ‎10-12-2018

Hi @Anonymous ,

Please make sure your boot mode settings are correct. For JATG, SW6 0 0 0 0(all should be ON).

Please check PMU Global error status register, from this you can know the issue what it is.

You can read PMU_Global error status register from XSCT console in SDK by using following command : 

1. mrd 0xFFD80530 (for error status 1) 

2.  mrd 0xFFD80540(for error status 2)

Please also go through zcu102 debug checklist.

https://www.xilinx.com/support/answers/68386.html

Thanks & Regards
Anil B
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Anonymous
Not applicable
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@abommera wrote:

Hi @Anonymous ,

Please make sure your boot mode settings are correct. For JATG, SW6 0 0 0 0(all should be ON).

Please check PMU Global error status register, from this you can know the issue what it is.

You can read PMU_Global error status register from XSCT console in SDK by using following command : 

1. mrd 0xFFD80530 (for error status 1) 

2.  mrd 0xFFD80540(for error status 2)

Please also go through zcu102 debug checklist.

https://www.xilinx.com/support/answers/68386.html


I ran the follow commands, and this is what I get.

mrd 0xFFD80530 -> 00000000

mrd 0xFFD80540 -> 02000000

 

What does that status bit mean for error status 2?

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Moderator
Moderator
628 Views
Registered: ‎06-27-2017

HI @Anonymous 

THis means  you got PMU pre-boot error.

Please read below register to debug further.

0xFFD60338. - PMU_PB_ERR (PMU_LOCAL) Register

This is PMU local register so you need to disable the debug feature. Please find the steps suggested below.

connect
tcfchan#1
xsct% ta
   1 PS TAP
   2 PMU
   3 PL
4* PSU
  5 RPU
  6 Cortex-R5 #0 (Running)
  7 Cortex-R5 #1 (Lock Step Mode)
8 APU (L2 Cache Reset)
  9 Cortex-A53 #0 (APU Reset)
  10 Cortex-A53 #1 (APU Reset)

xsct% mask_write 0xffca0038 0x1c0 0x1c0
xsct% ta
1 PS TAP
2 PMU
11 MicroBlaze PMU (Sleeping. No clock)
3 PL
4* PSU
5 RPU
6 Cortex-R5 #0 (Running)
7 Cortex-R5 #1 (Lock Step Mode)
8 APU (L2 Cache Reset)
9 Cortex-A53 #0 (APU Reset)
10 Cortex-A53 #1 (APU Reset)
xsct% ta 11
xsct% mrd -force 0xffd60338
FFD60338: 8A000000

 

Best Regards
Kranthi
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