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michelcharette
Observer
Observer
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Registered: ‎06-07-2012

Zynq: how to use register DRAM_param_reg4 to access a lpDDR2 configuration

I'm trying to access a lpDDR2's IC's Mode Registers and that normally would go through the Zynq's DRAM_param_reg4 register. Does anyone have an example on how to use this register?

AR# 47582 (https://www.xilinx.com/support/answers/47582.html) refers to this register without explanation.

 

The documentation (ug585) for the register's fields is confusing:

  • reg_ddrc_mr_rdata_valid: This bit indicates whether the Mode Register Read Data present at address 0xA9 is valid or not. 
    • Q: where does the 0xA9 come from? Sounds like a magic number pulled from another document without reference
  • reg_ddrc_mr_data: LPDDR2: The 16 bits are interpreted for reads and writes: (...) Writes: MR Addr[7:0], MR Data[7:0].
    • The bits 7:0 seem to hold both address and data and nothing in bits 15:8...

 

 

 

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yzhang
Moderator
Moderator
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Registered: ‎05-11-2010

MR register runtime access method is not provided. You can change the mode registers value during initialization in ps7_init.c. The related register is DRAM_param_reg4, DRAM_EMR_reg and DRAM_EMR_reg. Below article is an example to change ODT with mode register.

https://www.xilinx.com/support/answers/51744.html

 

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