UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Contributor
Contributor
735 Views
Registered: ‎09-22-2015

cache problems with ZYNQ AMP

Jump to solution

HI:

    I am using ZYNQ in AMP mode:   CPU0 runs Linux and CPU1 runs a bare-metal application

    CPU0 and CPU1 communicates with each other through the shared memory.

    

   The bare-metal application shutdown the L2 cache  and  config the shared memory cached.

   Then I use the following function to access the physical address in linux

   memfd = open("/dev/mem", O_RDWR | O_SYNC);

   mmap(0, 0x10000, PROT_READ | PROT_WRITE, MAP_SHARED, memfd, dev_base & ~ddr_mask);

 

  My questions are as follows

 1: Is the mmaped memroy in linux  cached or non-cached ?  I think It's non-cached

 2: when the CPU1 configs the shared memory cached ,the mmaped access to the memory in linux may have a cache

 inconsistent .But when the CPU1 configs the shared memory non-cached ,it takes about 3 times longer to run the program. 

 

  Is there any better solutions to this questions? Thanks very much!

 

   

0 Kudos
1 Solution

Accepted Solutions
Highlighted
Contributor
Contributor
850 Views
Registered: ‎04-04-2018

Re: cache problems with ZYNQ AMP

Jump to solution

> The bare-metal application shutdown the L2 cache

 

Good ;-)

 

> Is the mmaped memroy in linux  cached or

> non-cached ?  I think It's non-cached

 

Cache disabled.

 

> when the CPU1 configs the shared memory

> cached ,the mmaped access to the memory

> in linux may have a cache inconsistent

 

There should be no coherency issues due to CPU0 since shared memory should be cache disabled. However, if cache is enabled for the CPU1 shared memory region: you have to flush (after CPU1 writes data) and invalidate (before CPU1 reads data).

 

 

0 Kudos
1 Reply
Highlighted
Contributor
Contributor
851 Views
Registered: ‎04-04-2018

Re: cache problems with ZYNQ AMP

Jump to solution

> The bare-metal application shutdown the L2 cache

 

Good ;-)

 

> Is the mmaped memroy in linux  cached or

> non-cached ?  I think It's non-cached

 

Cache disabled.

 

> when the CPU1 configs the shared memory

> cached ,the mmaped access to the memory

> in linux may have a cache inconsistent

 

There should be no coherency issues due to CPU0 since shared memory should be cache disabled. However, if cache is enabled for the CPU1 shared memory region: you have to flush (after CPU1 writes data) and invalidate (before CPU1 reads data).

 

 

0 Kudos