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danielmcb
Visitor
Visitor
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Registered: ‎03-11-2021

clarification about Vivado export hardware "include bitstream"

hello,

 

I have a project under git vc which uses a folder layout something like this:

 

- PL folder contains all HDL files, Vivado project, block diagrams etc

- PL/export is used as a temporary folder to "export hardware" to. We always tick "include bitstream"

 

- PS folder contains all hwdef, bsp and application projects.

 

When we update the PL fabric we generally run "CHange Hardware Platform Spec" on the hw project. However it seems that the .bin file is NOT carried over with the changed hardware spec - we typically have to either:

- manually replace the .bit file which the hw project points to (and later commit it to the repo if we don't want to rebuild for each new checkout) or

- in debug settings point to the the correct .bin file there

In either case we need to makes sure the debugger programs the FPGA, of course.

 

Can someone at Xilinx please clarify what the "include bitstream" in Vivado does, when using a non-standard project layout like ours? Does the hdf file contain :

a) a reference to the location of the .bit file

b) the bitstream itself (I don't think so but ...)

c) none of the above?

And how is this related to whatever happens when we run "update h/w spec" on the hw project in SDK?

 

thanks for helping. Sorry if this si well explained somewhere in a UG but I didn't find it.

 

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bruce_karaffa
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Scholar
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Registered: ‎06-21-2017

The hdf file is simply a collection of compressed (zipped) files.  Unzip an hdf and you can see what it contains.  If you include the bitstream, the hdf will include a compressed bit file.

danielmcb
Visitor
Visitor
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Registered: ‎03-11-2021

ok, thank you Bruce! So "update hardware spec" unzips them all and updates them in the hw project? this is most helpful.

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