06-08-2011 12:08 PM
I made a project using EDK 12.1 and I want to use ISE 12.1 to generate the BIT file using VHDL codes generated in EDK.
But I dont know how to include all the libraries which were used in EDK.
Please help me to sort out this problem.
06-08-2011 03:15 PM
If you look in the system folder there is a file called system_stub.vhd. There's also one called system.ucf.
I'm assuming you chose the default name (system) in edk.
You should be able to create a project in ISE and import these files. That should supply you with what you need to compile it. There may be a couple of other files needed but if you used the standard EDk directory structure the tools should find everything.
I think you should also be able to generate a bitstream from EDK by selecting 'generate bitstream' from the hardware menu.
06-09-2011 02:11 AM
thnks for the help...but this is not working.
also i cant understand what do u mean by standard EDK directory.
Actually i am working on Alpha Data card, so i want to do some changes in the vhdl files generated by EDK, hence the Bit file generated by EDK cant be used.
Do u hav any other idea?
06-09-2011 09:50 AM - edited 06-09-2011 09:52 AM
From ISE you can add your XMP file generated with the EDK (add source).
You can generate the "HDL INSTANTIATION TEMPLATE" and you can use your "EDK SYSTEM" like an instance of another top level.
06-09-2011 10:03 AM
06-13-2011 01:21 PM - edited 06-13-2011 02:05 PM
I think the answer is on the same directory level as the xmp file there is a directory called hdl.
This directory contains vhdl files of the wrappers of each of the system components. I don't believe
you need to modify these files.
There is a directory also called pcores. This has the files of your user defined IPIF peripherals. These files
you would have to modify to add user logic.
There is Xilinx VHDL files in the Xilinx directories which are is being used to implement the Xilinx Logic.
For instance :
I don't believe you should modify these files either.
Of course since you are in ISE environment you can now add your own logic to the ISE design. This logic can
interface to the ports of EDK System as required. So you can create directories to hold your external logic.
06-20-2011 02:22 AM
in all my projects the pcore folder is empty.
also if i change the generated VHDL files it makes no change in the project, if i need to make some changes in the VHDL files how can i do it?
06-20-2011 08:59 AM - edited 06-20-2011 09:00 AM
Since your pcore directory is empty. You have not added user peripherals (IPIF) to your project. So you do not need to
add user logic since these IPIFs are not part of your project.
I am not sure why you would want to edit EDK files for the Xilinx components. Usually it is enough to read the data sheet of the components and maybe add parameters in the MHS file to change the component operation.
06-21-2011 12:07 AM
Actually I am trying to implement microblaze on Alpha Data Card.
It is easy to do it on digilant board as we have uart there, but how to implement it on ADC as there we have to take care of the protocols of PCI bus. Also we cant view the the microblaze codes as they are in encrypted form, so please guide me how to implement it on ADC.