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Participant cesys
Participant
7,501 Views
Registered: ‎08-02-2013

toochain for generating PROM file for AC701

My current tool chain for a Microblaze based ARTIX-7 design.

 

1. Using Vivado: Generate Bitfile and export it to SDK (File->Export->Export Hardware)

2. Using SDK: Program FPGA and  Run as -> Launch on Hardware (GDB)

 

Now I've debugged everything and want to program the whole thing in the PROM File of my AC701 evaluation board.

I've added the elf file of the sdk to the vivado project, rebuilt the project and used Hardware manager to programm the SPI Flash of the AC701 board. But the Microblaze software does not run.

 

Question:

Am I on the right track? Is there a tutorial about "How to bring a working Microblace design into Flash" ?

 

Thank you for helping!

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4 Replies
Xilinx Employee
Xilinx Employee
7,482 Views
Registered: ‎08-02-2007

Re: toochain for generating PROM file for AC701

hi,

 

there is a procedure to do a flash programming for Serial SPI Flash. refer to http://www.xilinx.com/support/documentation/application_notes/xapp1053.pdf

 

--hem

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Participant cesys
Participant
7,474 Views
Registered: ‎08-02-2013

Re: toochain for generating PROM file for AC701

Thank you for your answer.

The documentation you showed me is for ISE 9.2i but i am using Vivado 2015.1

I  think programming the Flash is not the primary problem.

 

First, I need to produce a bitfile that hast the microblaze code in it.

 

How can I get such a bitfile using Vivado design flow?

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Moderator
Moderator
7,468 Views
Registered: ‎01-15-2008

Re: toochain for generating PROM file for AC701

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Participant cesys
Participant
7,464 Views
Registered: ‎08-02-2013

Re: toochain for generating PROM file for AC701

Thank you for your answer.

In LAB 3, the FPGA is programmed using the SDK. Then the elf file is downloaded by using the SDK.

That is exactly how I work up to now.

 

What I need to know is:  

How can I embedd the elf file into the FPGA configuration file so that the bitfile includes the microblaze code and I can use it without SDK.

 

I tried to add an example elf file (Hello World) to the vivado project but when I load the resulting bitfile into the FPGA it does not output "Hello World" as it does when using the SDK method described above.

 

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