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Adventurer
Adventurer
3,348 Views
Registered: ‎11-02-2014

Accepted process for modifying pl.dtsi with device tree overlays

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Hi,

I am trying to modify the device tree overlay for my programmable logic. Since the PL node is removed from the system.dts, clearly the solution is not to to redefine the fragment@x nodes in system-user.dtsi. I have tried this and, though the system compiles, it does not work (it seems to break uboot, in fact).


Petalinux does not seem to add an equivalent 'include system_user.dtsi' line to pl.dtsi, and since pl.dtsi is auto generated, I do not see how I can modify it to add a recipe to modify it's contents.

Any suggestions? Or am I misunderstanding something?

Best,

Brian

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Contributor
Contributor
3,153 Views
Registered: ‎12-21-2018

Hi Brian,

I've managed to produce a customized PL device tree overlay using the following steps :

1) Create pl-user.dtsi file next to system-user.tdsi in the ./project-spec/meta-user/recipes-bsp/device-tree and add the content to be appended to the PL overlay device tree source :

In my case, I want to define the nodes of 2 GPIO expanders connected to an AXI I2C IP. So here is the pl-user.dtsi content :

 

/ {
    fragment@2 {
        target = <&amba>;
        overlay2: __overlay__ {        
            i2c@800f1000 {        
                gpio@23 {
                    #gpio-cells = <0x2>;
                    compatible = "ti,tca6424";
                    reg = <0x23>;
                    gpio-controller;
                };

                gpio@21 {
                    #gpio-cells = <0x2>;
                    compatible = "ti,tca6416";
                    reg = <0x21>;
                    gpio-controller;
                };
            };
        };
    };
};

 

 

2) Add some python code to device-tree.bbappend recipe  :
- reading the content of pl.dtsi
- reading the content of pl-user.dtsi
- creating a new file pl_custom.dtsi in the folder ./components/plnx_workspace/device-tree/device-tree/ where sit system-top.dts and pl.dtsi.
- appending to that file the content of pl.dtsi and pl-user.dtsi

device-tree.bbappend content :

 

FILESEXTRAPATHS_prepend := "${THISDIR}/files:"

SRC_URI += "file://system-user.dtsi \
            file://pl-user.dtsi \
            "

KERNEL_DEVICETREE += "pl_custom.dtbo"

do_compile_prepend() {
    
    # Read the pl.dtsi content
    fin = open(d.getVar('DT_FILES_PATH') + "/pl.dtsi", "r")
    pl_dtsi_content = fin.read()
    fin.close()
    
    # Read the pl-user.dtsi content
    fin = open(d.getVar('WORKDIR') + "/pl-user.dtsi", "r")
    pl_user_dtsi_content = fin.read()
    fin.close()
    
    # Append both pl.dtsi and pl-user.dtsi to output pl_custom.dtsi
    fout = open(d.getVar('DT_FILES_PATH') + '/pl_custom.dtsi', "w+")
    fout.write(pl_dtsi_content)
    fout.write("\n")
    fout.write(pl_user_dtsi_content)
    fout.close()
}

3) create an append file for the fpga-manager-util recipe (./project-spec/meta-user/recipes-bsp/fpga-manager-util/fpga-manager-util_%.bbappend) to deploy the compiled dtbo (pl_custom.dtbo) to /lib/firmware :

 

fpga-manager-util_%.bbappend content :

 

do_compile_append() {
    cp ${RECIPE_SYSROOT}/boot/devicetree/pl_custom.dtbo ${XSCTH_WS}/pl_custom.dtbo
}

do_install_append() {
    install -Dm 0644 pl_custom.dtbo ${D}/lib/firmware/base/pl_custom.dtbo
}

4) On the target board, instead of doing echo -n "base.dtbo" > full/path, do :

 echo -n "pl_custom.dtbo" > full/path

5) Bingo ! (the 2 I2C I/O expanders are seen and the right linux drivers loaded)

 

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Moderator
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Registered: ‎12-04-2016
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Adventurer
Adventurer
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Registered: ‎11-02-2014

Hi Shabbirk,

Yes, I have read the section you mentioned a few times. There is nothing in there describing how to change pl.dtsi, which again, is removed as an inclusion from system-top.dts, and cannot be modified by system-user.dtsi when the fpga manager and device tree overlays are enabled. It is compiled as its own device tree overlay. It would need an entry for a user inclusion in the components/plnx_workspace/devicetree/pl.dtsi source folder.

 

Thanks,

Brian

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Adventurer
Adventurer
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Registered: ‎11-02-2014

From page 109 of the Petalinux Reference Guide:

"Add /include/ “system-user-1.dtsi in project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi. The file should look like the following:/include/ "system-conf.dtsi"/include/ "system-user-1.dtsi"/ {};"

This is the instruction for adding additional user.dtsi files. However, if FPGA Manager is enabled, and device tree overlays are enabled then pl.dtsi is not added to system-top.dtsi in components/plnx_worskpace/device-tree/device-tree, therefore adding sources to system-user.dtsi will have no effect on the contents of pl.dtsi. Two seperate dtb generation commands are issued in this case, so the device tree and the device tree overlay are seperate entities.

I would really welcome any suggestions here, as it seems like a pretty big gap in the configuration setup, that could be very easily fixedby adding an "/include/ pl-user.dtsi" to the pl.dtsi file. I can't do that myself though, because the file is auto generated.

 

 

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Contributor
Contributor
3,173 Views
Registered: ‎12-21-2018

Hi Brian,

I'm facing the same issue. I want to modify the PL device tree overlay to define some I2C GPIO expanders which are connected to an AXI-I2C IP, but I'ven't found an easy way to do it.

I've tried to add a custom dtsi including pl.dtsi in the device-tree.bbappend recipe, but it seems to not be compiled. I'll try to define a custom app recipe to compile dtsi and deploy dtbo for my custom device tree overlay.

But I think petalinux should provide a way to do that the same way we use the system-user.dtsi to customize  the system device tree.

Jeremy

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Contributor
Contributor
3,154 Views
Registered: ‎12-21-2018

Hi Brian,

I've managed to produce a customized PL device tree overlay using the following steps :

1) Create pl-user.dtsi file next to system-user.tdsi in the ./project-spec/meta-user/recipes-bsp/device-tree and add the content to be appended to the PL overlay device tree source :

In my case, I want to define the nodes of 2 GPIO expanders connected to an AXI I2C IP. So here is the pl-user.dtsi content :

 

/ {
    fragment@2 {
        target = <&amba>;
        overlay2: __overlay__ {        
            i2c@800f1000 {        
                gpio@23 {
                    #gpio-cells = <0x2>;
                    compatible = "ti,tca6424";
                    reg = <0x23>;
                    gpio-controller;
                };

                gpio@21 {
                    #gpio-cells = <0x2>;
                    compatible = "ti,tca6416";
                    reg = <0x21>;
                    gpio-controller;
                };
            };
        };
    };
};

 

 

2) Add some python code to device-tree.bbappend recipe  :
- reading the content of pl.dtsi
- reading the content of pl-user.dtsi
- creating a new file pl_custom.dtsi in the folder ./components/plnx_workspace/device-tree/device-tree/ where sit system-top.dts and pl.dtsi.
- appending to that file the content of pl.dtsi and pl-user.dtsi

device-tree.bbappend content :

 

FILESEXTRAPATHS_prepend := "${THISDIR}/files:"

SRC_URI += "file://system-user.dtsi \
            file://pl-user.dtsi \
            "

KERNEL_DEVICETREE += "pl_custom.dtbo"

do_compile_prepend() {
    
    # Read the pl.dtsi content
    fin = open(d.getVar('DT_FILES_PATH') + "/pl.dtsi", "r")
    pl_dtsi_content = fin.read()
    fin.close()
    
    # Read the pl-user.dtsi content
    fin = open(d.getVar('WORKDIR') + "/pl-user.dtsi", "r")
    pl_user_dtsi_content = fin.read()
    fin.close()
    
    # Append both pl.dtsi and pl-user.dtsi to output pl_custom.dtsi
    fout = open(d.getVar('DT_FILES_PATH') + '/pl_custom.dtsi', "w+")
    fout.write(pl_dtsi_content)
    fout.write("\n")
    fout.write(pl_user_dtsi_content)
    fout.close()
}

3) create an append file for the fpga-manager-util recipe (./project-spec/meta-user/recipes-bsp/fpga-manager-util/fpga-manager-util_%.bbappend) to deploy the compiled dtbo (pl_custom.dtbo) to /lib/firmware :

 

fpga-manager-util_%.bbappend content :

 

do_compile_append() {
    cp ${RECIPE_SYSROOT}/boot/devicetree/pl_custom.dtbo ${XSCTH_WS}/pl_custom.dtbo
}

do_install_append() {
    install -Dm 0644 pl_custom.dtbo ${D}/lib/firmware/base/pl_custom.dtbo
}

4) On the target board, instead of doing echo -n "base.dtbo" > full/path, do :

 echo -n "pl_custom.dtbo" > full/path

5) Bingo ! (the 2 I2C I/O expanders are seen and the right linux drivers loaded)

 

View solution in original post

Highlighted
Adventurer
Adventurer
3,053 Views
Registered: ‎11-02-2014

Hi Jeremy,

Thanks very much for the feedback on this! I will be getting back to that process very soon, so your guide will be extremely helpful. although I can't yet confirm that it worked on my end, I will tentatively mark as the solution!

Best,

Brian

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Observer
Observer
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Registered: ‎11-01-2019

I'm trying to utilize this solution but I keep getting cyrptic syntax errors when adding the python code to bb appends file, I'm using petalinux 2018.3, is there something that has to be installed/enabled to get this to work right?

Traceback (most recent call last):
  File "/home/bb.ibw5028/opt/petalinux_2018.3/components/yocto/source/aarch64/layers/core/bitbake/lib/bb/codeparser.py", line 370, in ShellParser._parse_shell(value='\n    # Read the pl.dtsi content\n    fin = open(d.getVar(\'DT_FILES_PATH\') + "/pl.dtsi", "r")\n    pl_dtsi_content = fin.read()\n    fin.close()\n\n    # Read the pl-user.dtsi content\n    fin = open(d.getVar(\'WORKDIR\') + "/pl-user.dtsi", "r")\n    pl_user_dtsi_content = fin.read()\n    fin.close()\n\n    # Append both pl.dtsi and pl-user.dtsi to output pl_custom.dtsi\n    fout = open(d.getVar(\'DT_FILES_PATH\') + \'/pl_custom.dtsi\', "w+")\n    fout.write(pl_dtsi_content)\n    fout.write("\\n")\n    fout.write(pl_user_dtsi_content)\n    fout.close()\n\t[ -e /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/../components/plnx_workspace/device-tree/device-tree/system.dts ] && rm /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/../components/plnx_workspace/device-tree/device-tree/system.dts\n\tfor DTS_FILE in /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/../components/plnx_workspace/device-tree/device-tree/*.dts*; do\n\t\tDTS_NAME=`basename -s .dts ${DTS_FILE}`\n\t\tgcc  -E  \t\t-nostdinc -Ulinux -x assembler-with-cpp \t\t-I/home/bb.ibw5028/hdl/axidmatest/axidmatest/build/../components/plnx_workspace/device-tree/device-tree -I/home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/include -I/home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/arch/arm64/boot/dts/xilinx -I/home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/include -I/home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work/plnx_zynqmp-xilinx-linux/device-tree/xilinx+gitAUTOINC+b7466bbeee-r0 \t\t -o `basename ${DTS_FILE}`.pp ${DTS_FILE}\n\n\t\t# for now use the existance of the \'/plugin/\' tag to detect overlays\n\t\tif grep -qse "/plugin/;" `basename ${DTS_FILE}`.pp; then\n\t\t\tDTS_NAME=`basename -s .dtsi ${DTS_FILE}`\n\t\t\tdtc -@ -H epapr -I dts -O dtb  \t\t-R 8 -p 0x1000 -b 0 \t\t-i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/../components/plnx_workspace/device-tree/device-tree -i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/include -i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/arch/arm64/boot/dts/xilinx -i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/include -i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work/plnx_zynqmp-xilinx-linux/device-tree/xilinx+gitAUTOINC+b7466bbeee-r0 \t\t -@ \t\t  -o ${DTS_NAME}.dtbo `basename ${DTS_FILE}`.pp\n\t\telif [ "${DTS_FILE##*.}" = "dts" ]; then\n\t\t\tdtc -I dts -O dtb  \t\t-R 8 -p 0x1000 -b 0 \t\t-i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/../components/plnx_workspace/device-tree/device-tree -i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/include -i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/arch/arm64/boot/dts/xilinx -i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/include -i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work/plnx_zynqmp-xilinx-linux/device-tree/xilinx+gitAUTOINC+b7466bbeee-r0 \t\t -@ \t\t  -o ${DTS_NAME}.dtb `basename ${DTS_FILE}`.pp\n\t\t\tdtc -I dtb -O dts -o ${DTS_NAME}.dts ${DTS_NAME}.dtb\n\t\tfi\n\tdone\n'):
             try:
    >            tokens, _ = pyshyacc.parse(value, eof=True, debug=False)
             except pyshlex.NeedMore:
  File "/home/bb.ibw5028/opt/petalinux_2018.3/components/yocto/source/aarch64/layers/core/bitbake/lib/bb/pysh/pyshyacc.py", line 673, in parse(input='\n    # Read the pl.dtsi content\n    fin = open(d.getVar(\'DT_FILES_PATH\') + "/pl.dtsi", "r")\n    pl_dtsi_content = fin.read()\n    fin.close()\n\n    # Read the pl-user.dtsi content\n    fin = open(d.getVar(\'WORKDIR\') + "/pl-user.dtsi", "r")\n    pl_user_dtsi_content = fin.read()\n    fin.close()\n\n    # Append both pl.dtsi and pl-user.dtsi to output pl_custom.dtsi\n    fout = open(d.getVar(\'DT_FILES_PATH\') + \'/pl_custom.dtsi\', "w+")\n    fout.write(pl_dtsi_content)\n    fout.write("\\n")\n    fout.write(pl_user_dtsi_content)\n    fout.close()\n\t[ -e /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/../components/plnx_workspace/device-tree/device-tree/system.dts ] && rm /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/../components/plnx_workspace/device-tree/device-tree/system.dts\n\tfor DTS_FILE in /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/../components/plnx_workspace/device-tree/device-tree/*.dts*; do\n\t\tDTS_NAME=`basename -s .dts ${DTS_FILE}`\n\t\tgcc  -E  \t\t-nostdinc -Ulinux -x assembler-with-cpp \t\t-I/home/bb.ibw5028/hdl/axidmatest/axidmatest/build/../components/plnx_workspace/device-tree/device-tree -I/home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/include -I/home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/arch/arm64/boot/dts/xilinx -I/home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/include -I/home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work/plnx_zynqmp-xilinx-linux/device-tree/xilinx+gitAUTOINC+b7466bbeee-r0 \t\t -o `basename ${DTS_FILE}`.pp ${DTS_FILE}\n\n\t\t# for now use the existance of the \'/plugin/\' tag to detect overlays\n\t\tif grep -qse "/plugin/;" `basename ${DTS_FILE}`.pp; then\n\t\t\tDTS_NAME=`basename -s .dtsi ${DTS_FILE}`\n\t\t\tdtc -@ -H epapr -I dts -O dtb  \t\t-R 8 -p 0x1000 -b 0 \t\t-i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/../components/plnx_workspace/device-tree/device-tree -i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/include -i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/arch/arm64/boot/dts/xilinx -i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/include -i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work/plnx_zynqmp-xilinx-linux/device-tree/xilinx+gitAUTOINC+b7466bbeee-r0 \t\t -@ \t\t  -o ${DTS_NAME}.dtbo `basename ${DTS_FILE}`.pp\n\t\telif [ "${DTS_FILE##*.}" = "dts" ]; then\n\t\t\tdtc -I dts -O dtb  \t\t-R 8 -p 0x1000 -b 0 \t\t-i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/../components/plnx_workspace/device-tree/device-tree -i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/include -i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/arch/arm64/boot/dts/xilinx -i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work-shared/plnx-zynqmp/kernel-source/include -i /home/bb.ibw5028/hdl/axidmatest/axidmatest/build/tmp/work/plnx_zynqmp-xilinx-linux/device-tree/xilinx+gitAUTOINC+b7466bbeee-r0 \t\t -@ \t\t  -o ${DTS_NAME}.dtb `basename ${DTS_FILE}`.pp\n\t\t\tdtc -I dtb -O dts -o ${DTS_NAME}.dts ${DTS_NAME}.dtb\n\t\tfi\n\tdone\n', eof=True, debug=False):
             debug = 2
    >    return yacc.parse(lexer=lexer, debug=debug), remaining
     
  File "/home/bb.ibw5028/opt/petalinux_2018.3/components/yocto/source/aarch64/layers/core/bitbake/lib/ply/yacc.py", line 267, in LRParser.parse(input=None, lexer=<bb.pysh.pyshlex.PLYLexer object at 0x7fe655e6f710>, debug=False, tracking=0, tokenfunc=None):
             else:
    >            return self.parseopt_notrack(input,lexer,debug,tracking,tokenfunc)
             
  File "/home/bb.ibw5028/opt/petalinux_2018.3/components/yocto/source/aarch64/layers/core/bitbake/lib/ply/yacc.py", line 1049, in LRParser.parseopt_notrack(input=None, lexer=<bb.pysh.pyshlex.PLYLexer object at 0x7fe655e6f710>, debug=False, tracking=0, tokenfunc=None):
                                 errtoken.lexer = lexer
    >                        tok = self.errorfunc(errtoken)
                             del errok, token, restart   # Delete special functions
  File "/home/bb.ibw5028/opt/petalinux_2018.3/components/yocto/source/aarch64/layers/core/bitbake/lib/bb/pysh/pyshyacc.py", line 646, in p_error(p=LexToken(TOKEN,"'DT_FILES_PATH'",0,0)):
             w('  %r\n' % n)
    >    raise sherrors.ShellSyntaxError(''.join(msg))
     
bb.pysh.sherrors.ShellSyntaxError: LexToken(TOKEN,"'DT_FILES_PATH'",0,0)
followed by:
  LexToken(RPARENS,')',0,0)
  LexToken(TOKEN,'+',0,0)
  LexToken(TOKEN,'"/pl.dtsi",',0,0)
  LexToken(TOKEN,'"r"',0,0)
  LexToken(RPARENS,')',0,0)



Summary: There were 2 WARNING messages shown.
Summary: There was 1 ERROR message shown, returning a non-zero exit code.
ERROR: Failed to build device-tree
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Contributor
Contributor
2,708 Views
Registered: ‎12-21-2018

It seems that bitbake doesn't use the right parser (shell parser instead of pyton parser)... maybe the device-tree recipe in Petalinux 2018.3 is written in shell script? In that case, you need to port the python code to bash. it sjhould be kinda easy :)

Highlighted
Explorer
Explorer
1,672 Views
Registered: ‎03-21-2019

Thanks for the instructions, jeremy@easii-ic. I am running into an issue:

pl_custom.dtbo: ERROR (duplicate_node_names): /fragment@0: Duplicate node name
pl_custom.dtbo: ERROR (duplicate_node_names): /fragment@1: Duplicate node name
pl_custom.dtbo: ERROR (duplicate_node_names): /fragment@2: Duplicate node name

I think it has to do with how I am formatting my pl-user.dtsi. I'm trying to do it similarly to how I would normally format system-user.dtsi, as in, putting node changes as &references at the global level, and adding new nodes inside the { / ... }; area. Is this not the correct way to do it? Do I need to explicitly reference the fragment I want to modify when I am modifying or adding nodes, or is my formatting for the fragments themselves incorrect somehow?

This is my full pl_custom.dtsi (pl.dtsi ends, and pl-user.dtsi begins, with the line "#include <dt-bindings/media/xilinx-vip.h>"):

Spoiler

/*
* CAUTION: This file is automatically generated by Xilinx.
* Version:
* Today is: Fri Apr 3 18:01:46 2020
*/


/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&fpga_full>;
overlay0: __overlay__ {
#address-cells = <2>;
#size-cells = <2>;
firmware-name = "Trillian_bd_wrapper.bit.bin";
resets = <&zynqmp_reset 116>;
};
};
fragment@1 {
target = <&amba>;
overlay1: __overlay__ {
afi0: afi0 {
compatible = "xlnx,afi-fpga";
config-afi = < 0 0>, <1 0>, <2 0>, 0>, <4 0>, <5 0>, <6 0>, <7 0>, <8 0>, <9 0>, <10 0>, <11 0>, <12 0>, <13 0>, <14 0xa00>, <15 0x000>;
};
clocking0: clocking0 {
#clock-cells = <0>;
assigned-clock-rates = <99990005>;
assigned-clocks = <&zynqmp_clk 71>;
clock-output-names = "fabric_clk";
clocks = <&zynqmp_clk 71>;
compatible = "xlnx,fclk";
};
clocking1: clocking1 {
#clock-cells = <0>;
assigned-clock-rates = <299970032>;
assigned-clocks = <&zynqmp_clk 72>;
clock-output-names = "fabric_clk";
clocks = <&zynqmp_clk 72>;
compatible = "xlnx,fclk";
};
clocking2: clocking2 {
#clock-cells = <0>;
assigned-clock-rates = <249975021>;
assigned-clocks = <&zynqmp_clk 73>;
clock-output-names = "fabric_clk";
clocks = <&zynqmp_clk 73>;
compatible = "xlnx,fclk";
};
};
};
fragment@2 {
target = <&amba>;
overlay2: __overlay__ {
#address-cells = <2>;
#size-cells = <2>;
ch1_v_frmbuf_rd_0: v_frmbuf_rd@a0050000 {
#dma-cells = <1>;
clock-names = "ap_clk";
clocks = <&zynqmp_clk 72>;
compatible = "xlnx,v-frmbuf-rd-2.1", "xlnx,axi-frmbuf-rd-v2.1";
interrupt-names = "interrupt";
interrupt-parent = <&gic>;
interrupts = <0 94 4>;
reg = <0x0 0xa0050000 0x0 0x10000>;
reset-gpios = <&gpio 78 1>;
xlnx,dma-addr-width = <32>;
xlnx,dma-align = <16>;
xlnx,max-height = <2160>;
xlnx,max-width = <3840>;
xlnx,pixels-per-clock = <2>;
xlnx,s-axi-ctrl-addr-width = <0x7>;
xlnx,s-axi-ctrl-data-width = <0x20>;
xlnx,vid-formats = "rgb888", "xbgr8888", "xrgb8888", "bgr888", "uyvy", "y8", "vuy888", "xvuy8888", "yuyv", "nv12", "nv16";
xlnx,video-width = <8>;
};
ch1_v_frmbuf_wr_0: v_frmbuf_wr@a0090000 {
#dma-cells = <1>;
clock-names = "ap_clk";
clocks = <&zynqmp_clk 72>;
compatible = "xlnx,v-frmbuf-wr-2.1", "xlnx,axi-frmbuf-wr-v2.1";
interrupt-names = "interrupt";
interrupt-parent = <&gic>;
interrupts = <0 92 4>;
reg = <0x0 0xa0090000 0x0 0x10000>;
reset-gpios = <&gpio 79 1>;
xlnx,dma-addr-width = <32>;
xlnx,dma-align = <16>;
xlnx,max-height = <2160>;
xlnx,max-width = <3840>;
xlnx,pixels-per-clock = <2>;
xlnx,s-axi-ctrl-addr-width = <0x7>;
xlnx,s-axi-ctrl-data-width = <0x20>;
xlnx,vid-formats = "rgb888", "bgr888", "xbgr8888", "xrgb8888", "uyvy", "y8", "vuy888", "xvuy8888", "yuyv", "nv12", "nv16";
xlnx,video-width = <8>;
};
ch1_v_hdmi_rx_ss_0: v_hdmi_rx_ss@a00a0000 {
clock-names = "s_axi_cpu_aclk", "link_clk", "s_axis_audio_aclk", "video_clk", "s_axis_video_aclk";
clocks = <&zynqmp_clk 71>, <&misc_clk_0>, <&zynqmp_clk 71>, <&misc_clk_1>, <&zynqmp_clk 72>;
compatible = "xlnx,v-hdmi-rx-ss-3.1", "xlnx,v-hdmi-rx-ss-3.1";
interrupt-names = "irq";
interrupt-parent = <&gic>;
interrupts = <0 105 4>;
phy-names = "hdmi-phy0", "hdmi-phy1", "hdmi-phy2";
phys = <&vphy_lane0 0 1 1 0>, <&vphy_lane1 0 1 1 0>, <&vphy_lane2 0 1 1 0>;
reg = <0x0 0xa00a0000 0x0 0x10000>;
xlnx,edid-ram-size = <0x100>;
xlnx,input-pixels-per-clock = <2>;
xlnx,max-bits-per-component = <8>;
hdmirx_ports_ch1_v_hdmi_rx_ss_0: ports {
#address-cells = <1>;
#size-cells = <0>;
hdmirx_port_ch1_v_hdmi_rx_ss_0: port@0 {
/* Fill the fields xlnx,video-format and xlnx,video-width based on user requirement */
reg = <0>;
xlnx,video-format = <0>;
xlnx,video-width = <10>;
hdmi_rx_out_ch1_v_hdmi_rx_ss_0: endpoint {
remote-endpoint = <&csc_in>;
};
};
};
};
misc_clk_0: misc_clk_0 {
#clock-cells = <0>;
clock-frequency = <148500000>;
compatible = "fixed-clock";
};
misc_clk_1: misc_clk_1 {
#clock-cells = <0>;
clock-frequency = <297000000>;
compatible = "fixed-clock";
};
ch1_v_hdmi_tx_ss_0: v_hdmi_tx_ss@a0060000 {
clock-names = "s_axi_cpu_aclk", "link_clk", "s_axis_audio_aclk", "video_clk", "s_axis_video_aclk";
clocks = <&zynqmp_clk 71>, <&misc_clk_0>, <&zynqmp_clk 71>, <&misc_clk_1>, <&zynqmp_clk 72>;
compatible = "xlnx,v-hdmi-tx-ss-3.1", "xlnx,v-hdmi-tx-ss-3.1";
interrupt-names = "irq";
interrupt-parent = <&gic>;
interrupts = <0 93 4>;
phy-names = "hdmi-phy0", "hdmi-phy1", "hdmi-phy2";
phys = <&vphy_lane0 0 1 1 1>, <&vphy_lane1 0 1 1 1>, <&vphy_lane2 0 1 1 1>;
reg = <0x0 0xa0060000 0x0 0x20000>;
xlnx,input-pixels-per-clock = <2>;
xlnx,max-bits-per-component = <8>;
hdmitx_ports_ch1_v_hdmi_tx_ss_0: ports {
#address-cells = <1>;
#size-cells = <0>;
encoder_hdmi_port_ch1_v_hdmi_tx_ss_0: port@0 {
reg = <0>;
hdmi_encoder_ch1_v_hdmi_tx_ss_0: endpoint {
remote-endpoint = <&pl_disp_crtc_ch1_v_hdmi_tx_ss_0>;
};
};
};
};
ch1_v_proc_ss_0: v_proc_ss@a0080000 {
clock-names = "aclk";
clocks = <&zynqmp_clk 72>;
compatible = "xlnx,v-proc-ss-2.1", "xlnx,vpss-csc", "xlnx,v-vpss-csc";
reg = <0x0 0xa0080000 0x0 0x10000>;
reset-gpios = <&gpio 94 1>;
xlnx,colorspace-support = <0>;
xlnx,csc-enable-window = "false";
xlnx,max-height = <2160>;
xlnx,max-width = <3840>;
xlnx,num-video-components = <3>;
xlnx,samples-per-clk = <2>;
xlnx,topology = <3>;
xlnx,use-uram = <0>;
xlnx,video-width = <8>;
};
ch1_vid_phy_controller_0: vid_phy_controller@a00b0000 {
clock-names = "mgtrefclk0_pad_p_in", "mgtrefclk0_pad_n_in", "mgtrefclk1_pad_p_in", "mgtrefclk1_pad_n_in", "vid_phy_tx_axi4s_aclk", "vid_phy_rx_axi4s_aclk", "vid_phy_sb_aclk", "vid_phy_axi4lite_aclk", "drpclk";
clocks = <&misc_clk_2>, <&misc_clk_2>, <&misc_clk_2>, <&misc_clk_2>, <&misc_clk_0>, <&misc_clk_0>, <&zynqmp_clk 71>, <&zynqmp_clk 71>, <&zynqmp_clk 71>;
compatible = "xlnx,vid-phy-controller-2.2", "xlnx,vid-phy-controller-2.1";
interrupt-names = "irq";
interrupt-parent = <&gic>;
interrupts = <0 104 4>;
reg = <0x0 0xa00b0000 0x0 0x10000>;
xlnx,hdmi-fast-switch = <1>;
xlnx,input-pixels-per-clock = <2>;
xlnx,nidru = <0>;
xlnx,nidru-refclk-sel = <0>;
xlnx,rx-no-of-channels = <3>;
xlnx,rx-pll-selection = <0>;
xlnx,rx-protocol = <1>;
xlnx,rx-refclk-sel = <1>;
xlnx,transceiver-type = <5>;
xlnx,transceiver-width = <2>;
xlnx,tx-buffer-bypass = <1>;
xlnx,tx-no-of-channels = <4>;
xlnx,tx-pll-selection = <6>;
xlnx,tx-protocol = <1>;
xlnx,tx-refclk-sel = <0>;
xlnx,use-gt-ch4-hdmi = <1>;
vphy_lane4: vphy_lane@4 {
#phy-cells = <4>;
};
};
misc_clk_2: misc_clk_2 {
#clock-cells = <0>;
clock-frequency = <100000000>;
compatible = "fixed-clock";
};
ch2_v_frmbuf_wr_0: v_frmbuf_wr@a00e0000 {
#dma-cells = <1>;
clock-names = "ap_clk";
clocks = <&zynqmp_clk 72>;
compatible = "xlnx,v-frmbuf-wr-2.1", "xlnx,axi-frmbuf-wr-v2.1";
interrupt-names = "interrupt";
interrupt-parent = <&gic>;
interrupts = <0 108 4>;
reg = <0x0 0xa00e0000 0x0 0x10000>;
reset-gpios = <&gpio 82 1>;
xlnx,dma-addr-width = <32>;
xlnx,dma-align = <16>;
xlnx,max-height = <2160>;
xlnx,max-width = <3840>;
xlnx,pixels-per-clock = <2>;
xlnx,s-axi-ctrl-addr-width = <0x7>;
xlnx,s-axi-ctrl-data-width = <0x20>;
xlnx,vid-formats = "rgb888", "bgr888", "xbgr8888", "xrgb8888", "uyvy", "y8", "vuy888", "xvuy8888", "yuyv", "nv12", "nv16";
xlnx,video-width = <8>;
};
ch2_v_hdmi_rx_ss_0: v_hdmi_rx_ss@a00c0000 {
clock-names = "s_axi_cpu_aclk", "link_clk", "s_axis_audio_aclk", "video_clk", "s_axis_video_aclk";
clocks = <&zynqmp_clk 71>, <&misc_clk_0>, <&zynqmp_clk 71>, <&misc_clk_1>, <&zynqmp_clk 72>;
compatible = "xlnx,v-hdmi-rx-ss-3.1", "xlnx,v-hdmi-rx-ss-3.1";
interrupt-names = "irq";
interrupt-parent = <&gic>;
interrupts = <0 106 4>;
phy-names = "hdmi-phy0", "hdmi-phy1", "hdmi-phy2";
phys = <&vphy_lane0 0 1 1 0>, <&vphy_lane1 0 1 1 0>, <&vphy_lane2 0 1 1 0>;
reg = <0x0 0xa00c0000 0x0 0x10000>;
xlnx,edid-ram-size = <0x100>;
xlnx,input-pixels-per-clock = <2>;
xlnx,max-bits-per-component = <8>;
hdmirx_ports_ch2_v_hdmi_rx_ss_0: ports {
#address-cells = <1>;
#size-cells = <0>;
hdmirx_port_ch2_v_hdmi_rx_ss_0: port@0 {
/* Fill the fields xlnx,video-format and xlnx,video-width based on user requirement */
reg = <0>;
xlnx,video-format = <0>;
xlnx,video-width = <10>;
hdmi_rx_out_ch2_v_hdmi_rx_ss_0: endpoint {
remote-endpoint = <&csc_in>;
};
};
};
};
ch2_v_proc_ss_0: v_proc_ss@a00d0000 {
clock-names = "aclk";
clocks = <&zynqmp_clk 72>;
compatible = "xlnx,v-proc-ss-2.1", "xlnx,vpss-csc", "xlnx,v-vpss-csc";
reg = <0x0 0xa00d0000 0x0 0x10000>;
reset-gpios = <&gpio 95 1>;
xlnx,colorspace-support = <0>;
xlnx,csc-enable-window = "false";
xlnx,max-height = <2160>;
xlnx,max-width = <3840>;
xlnx,num-video-components = <3>;
xlnx,samples-per-clk = <2>;
xlnx,topology = <3>;
xlnx,use-uram = <0>;
xlnx,video-width = <8>;
};
ch2_vid_phy_controller_0: vid_phy_controller@a00f0000 {
clock-names = "mgtrefclk1_pad_p_in", "mgtrefclk1_pad_n_in", "vid_phy_rx_axi4s_aclk", "vid_phy_sb_aclk", "vid_phy_axi4lite_aclk", "drpclk";
clocks = <&misc_clk_2>, <&misc_clk_2>, <&misc_clk_0>, <&zynqmp_clk 71>, <&zynqmp_clk 71>, <&zynqmp_clk 71>;
compatible = "xlnx,vid-phy-controller-2.2", "xlnx,vid-phy-controller-2.1";
interrupt-names = "irq";
interrupt-parent = <&gic>;
interrupts = <0 107 4>;
reg = <0x0 0xa00f0000 0x0 0x10000>;
xlnx,hdmi-fast-switch = <1>;
xlnx,input-pixels-per-clock = <2>;
xlnx,nidru = <0>;
xlnx,nidru-refclk-sel = <0>;
xlnx,rx-no-of-channels = <3>;
xlnx,rx-pll-selection = <0>;
xlnx,rx-protocol = <1>;
xlnx,rx-refclk-sel = <1>;
xlnx,transceiver-type = <5>;
xlnx,transceiver-width = <2>;
xlnx,tx-buffer-bypass = <1>;
xlnx,tx-no-of-channels = <3>;
xlnx,tx-pll-selection = <6>;
xlnx,tx-protocol = <3>;
xlnx,tx-refclk-sel = <0>;
xlnx,use-gt-ch4-hdmi = <0>;
};
ch3_v_frmbuf_wr_0: v_frmbuf_wr@a0220000 {
#dma-cells = <1>;
clock-names = "ap_clk";
clocks = <&zynqmp_clk 72>;
compatible = "xlnx,v-frmbuf-wr-2.1", "xlnx,axi-frmbuf-wr-v2.1";
interrupt-names = "interrupt";
interrupt-parent = <&gic>;
interrupts = <0 109 4>;
reg = <0x0 0xa0220000 0x0 0x10000>;
reset-gpios = <&gpio 85 1>;
xlnx,dma-addr-width = <32>;
xlnx,dma-align = <16>;
xlnx,max-height = <2160>;
xlnx,max-width = <3840>;
xlnx,pixels-per-clock = <2>;
xlnx,s-axi-ctrl-addr-width = <0x7>;
xlnx,s-axi-ctrl-data-width = <0x20>;
xlnx,vid-formats = "rgb888", "bgr888", "xbgr8888", "xrgb8888", "uyvy", "y8", "vuy888", "xvuy8888", "yuyv", "nv12", "nv16";
xlnx,video-width = <8>;
};
ch3_v_hdmi_rx_ss_0: v_hdmi_rx_ss@a0200000 {
clock-names = "s_axi_cpu_aclk", "link_clk", "s_axis_audio_aclk", "video_clk", "s_axis_video_aclk";
clocks = <&zynqmp_clk 71>, <&misc_clk_0>, <&zynqmp_clk 71>, <&misc_clk_1>, <&zynqmp_clk 72>;
compatible = "xlnx,v-hdmi-rx-ss-3.1", "xlnx,v-hdmi-rx-ss-3.1";
interrupt-names = "irq";
interrupt-parent = <&gic>;
interrupts = <0 110 4>;
phy-names = "hdmi-phy0", "hdmi-phy1", "hdmi-phy2";
phys = <&vphy_lane0 0 1 1 0>, <&vphy_lane1 0 1 1 0>, <&vphy_lane2 0 1 1 0>;
reg = <0x0 0xa0200000 0x0 0x10000>;
xlnx,edid-ram-size = <0x100>;
xlnx,input-pixels-per-clock = <2>;
xlnx,max-bits-per-component = <8>;
hdmirx_ports_ch3_v_hdmi_rx_ss_0: ports {
#address-cells = <1>;
#size-cells = <0>;
hdmirx_port_ch3_v_hdmi_rx_ss_0: port@0 {
/* Fill the fields xlnx,video-format and xlnx,video-width based on user requirement */
reg = <0>;
xlnx,video-format = <0>;
xlnx,video-width = <10>;
hdmi_rx_out_ch3_v_hdmi_rx_ss_0: endpoint {
remote-endpoint = <&csc_in>;
};
};
};
};
ch3_v_proc_ss_0: v_proc_ss@a0210000 {
clock-names = "aclk";
clocks = <&zynqmp_clk 72>;
compatible = "xlnx,v-proc-ss-2.1", "xlnx,vpss-csc", "xlnx,v-vpss-csc";
reg = <0x0 0xa0210000 0x0 0x10000>;
reset-gpios = <&gpio 96 1>;
xlnx,colorspace-support = <0>;
xlnx,csc-enable-window = "false";
xlnx,max-height = <2160>;
xlnx,max-width = <3840>;
xlnx,num-video-components = <3>;
xlnx,samples-per-clk = <2>;
xlnx,topology = <3>;
xlnx,use-uram = <0>;
xlnx,video-width = <8>;
csc_ports: ports {
#address-cells = <1>;
#size-cells = <0>;
csc_port0: port@0 {
/* For xlnx,video-format user needs to fill as per their requirement */
reg = <0>;
xlnx,video-format = <12>;
xlnx,video-width = <8>;
csc_in: endpoint {
remote-endpoint = <&hdmi_rx_out>;
};
};
};
};
ch3_vid_phy_controller_0: vid_phy_controller@a0230000 {
clock-names = "mgtrefclk1_pad_p_in", "mgtrefclk1_pad_n_in", "vid_phy_rx_axi4s_aclk", "vid_phy_sb_aclk", "vid_phy_axi4lite_aclk", "drpclk";
clocks = <&misc_clk_2>, <&misc_clk_2>, <&misc_clk_0>, <&zynqmp_clk 71>, <&zynqmp_clk 71>, <&zynqmp_clk 71>;
compatible = "xlnx,vid-phy-controller-2.2", "xlnx,vid-phy-controller-2.1";
interrupt-names = "irq";
interrupt-parent = <&gic>;
interrupts = <0 111 4>;
reg = <0x0 0xa0230000 0x0 0x10000>;
xlnx,hdmi-fast-switch = <1>;
xlnx,input-pixels-per-clock = <2>;
xlnx,nidru = <0>;
xlnx,nidru-refclk-sel = <0>;
xlnx,rx-no-of-channels = <3>;
xlnx,rx-pll-selection = <0>;
xlnx,rx-protocol = <1>;
xlnx,rx-refclk-sel = <1>;
xlnx,transceiver-type = <5>;
xlnx,transceiver-width = <2>;
xlnx,tx-buffer-bypass = <1>;
xlnx,tx-no-of-channels = <3>;
xlnx,tx-pll-selection = <6>;
xlnx,tx-protocol = <3>;
xlnx,tx-refclk-sel = <0>;
xlnx,use-gt-ch4-hdmi = <0>;
};
ch4_v_frmbuf_rd_0: v_frmbuf_rd@a0020000 {
#dma-cells = <1>;
clock-names = "ap_clk";
clocks = <&zynqmp_clk 72>;
compatible = "xlnx,v-frmbuf-rd-2.1", "xlnx,axi-frmbuf-rd-v2.1";
interrupt-names = "interrupt";
interrupt-parent = <&gic>;
interrupts = <0 95 4>;
reg = <0x0 0xa0020000 0x0 0x10000>;
reset-gpios = <&gpio 87 1>;
xlnx,dma-addr-width = <32>;
xlnx,dma-align = <16>;
xlnx,max-height = <2160>;
xlnx,max-width = <3840>;
xlnx,pixels-per-clock = <2>;
xlnx,s-axi-ctrl-addr-width = <0x7>;
xlnx,s-axi-ctrl-data-width = <0x20>;
xlnx,vid-formats = "rgb888", "xbgr8888", "xrgb8888", "bgr888", "uyvy", "y8", "vuy888", "xvuy8888", "yuyv", "nv12", "nv16";
xlnx,video-width = <8>;
};
ch4_v_hdmi_tx_ss_0: v_hdmi_tx_ss@a0000000 {
clock-names = "s_axi_cpu_aclk", "link_clk", "s_axis_audio_aclk", "video_clk", "s_axis_video_aclk";
clocks = <&zynqmp_clk 71>, <&misc_clk_0>, <&zynqmp_clk 71>, <&misc_clk_1>, <&zynqmp_clk 72>;
compatible = "xlnx,v-hdmi-tx-ss-3.1", "xlnx,v-hdmi-tx-ss-3.1";
interrupt-names = "irq";
interrupt-parent = <&gic>;
interrupts = <0 91 4>;
phy-names = "hdmi-phy0", "hdmi-phy1", "hdmi-phy2";
phys = <&vphy_lane0 0 1 1 1>, <&vphy_lane1 0 1 1 1>, <&vphy_lane2 0 1 1 1>;
reg = <0x0 0xa0000000 0x0 0x20000>;
xlnx,input-pixels-per-clock = <2>;
xlnx,max-bits-per-component = <8>;
hdmitx_ports_ch4_v_hdmi_tx_ss_0: ports {
#address-cells = <1>;
#size-cells = <0>;
encoder_hdmi_port_ch4_v_hdmi_tx_ss_0: port@0 {
reg = <0>;
hdmi_encoder_ch4_v_hdmi_tx_ss_0: endpoint {
remote-endpoint = <&pl_disp_crtc_ch4_v_hdmi_tx_ss_0>;
};
};
};
};
ch4_vid_phy_controller_0: vid_phy_controller@a0030000 {
clock-names = "mgtrefclk0_pad_p_in", "mgtrefclk0_pad_n_in", "vid_phy_tx_axi4s_aclk", "vid_phy_sb_aclk", "vid_phy_axi4lite_aclk", "drpclk";
clocks = <&misc_clk_2>, <&misc_clk_2>, <&misc_clk_0>, <&zynqmp_clk 71>, <&zynqmp_clk 71>, <&zynqmp_clk 71>;
compatible = "xlnx,vid-phy-controller-2.2", "xlnx,vid-phy-controller-2.1";
interrupt-names = "irq";
interrupt-parent = <&gic>;
interrupts = <0 89 4>;
reg = <0x0 0xa0030000 0x0 0x10000>;
xlnx,hdmi-fast-switch = <1>;
xlnx,input-pixels-per-clock = <2>;
xlnx,nidru = <0>;
xlnx,nidru-refclk-sel = <0>;
xlnx,rx-no-of-channels = <3>;
xlnx,rx-pll-selection = <0>;
xlnx,rx-protocol = <3>;
xlnx,rx-refclk-sel = <1>;
xlnx,transceiver-type = <5>;
xlnx,transceiver-width = <2>;
xlnx,tx-buffer-bypass = <1>;
xlnx,tx-no-of-channels = <3>;
xlnx,tx-pll-selection = <6>;
xlnx,tx-protocol = <1>;
xlnx,tx-refclk-sel = <0>;
xlnx,use-gt-ch4-hdmi = <0>;
vphy_lane0: vphy_lane@0 {
#phy-cells = <4>;
};
vphy_lane1: vphy_lane@1 {
#phy-cells = <4>;
};
vphy_lane2: vphy_lane@2 {
#phy-cells = <4>;
};
vphy_lane3: vphy_lane@3 {
#phy-cells = <4>;
};
};
psu_ctrl_ipi: PERIPHERAL@ff380000 {
compatible = "xlnx,PERIPHERAL-1.0";
reg = <0x0 0xff380000 0x0 0x80000>;
};
psu_message_buffers: PERIPHERAL@ff990000 {
compatible = "xlnx,PERIPHERAL-1.0";
reg = <0x0 0xff990000 0x0 0x10000>;
};
sysver_0: sysver@a0040000 {
clock-names = "s00_axi_aclk";
clocks = <&zynqmp_clk 71>;
compatible = "xlnx,sysver-2.0";
reg = <0x0 0xa0040000 0x0 0x1000>;
xlnx,master-version-major = <0x1>;
xlnx,master-version-minor = <0x1>;
xlnx,master-version-rev = <0x9>;
xlnx,master-version-top = <0x1>;
xlnx,s00-axi-addr-width = <0x4>;
xlnx,s00-axi-data-width = <0x20>;
xlnx,version-master = <0x1>;
};
vcu_0: vcu@a0100000 {
#address-cells = <2>;
#clock-cells = <1>;
#size-cells = <2>;
clock-names = "pll_ref", "aclk", "vcu_core_enc", "vcu_core_dec", "vcu_mcu_enc", "vcu_mcu_dec";
clocks = <&misc_clk_3>, <&zynqmp_clk 71>, <&vcu_0 1>, <&vcu_0 2>, <&vcu_0 3>, <&vcu_0 4>;
compatible = "xlnx,vcu-1.2", "xlnx,vcu";
interrupt-names = "vcu_host_interrupt";
interrupt-parent = <&gic>;
interrupts = <0 96 4>;
ranges ;
reg = <0x0 0xa0140000 0x0 0x1000>, <0x0 0xa0141000 0x0 0x1000>;
reg-names = "vcu_slcr", "logicore";
reset-gpios = <&gpio 119 0>;
encoder: al5e@a0100000 {
compatible = "al,al5e-1.2", "al,al5e";
interrupt-parent = <&gic>;
interrupts = <0 96 4>;
reg = <0x0 0xa0100000 0x0 0x10000>;
};
decoder: al5d@a0120000 {
compatible = "al,al5d-1.2", "al,al5d";
interrupt-parent = <&gic>;
interrupts = <0 96 4>;
reg = <0x0 0xa0120000 0x0 0x10000>;
};
};
misc_clk_3: misc_clk_3 {
#clock-cells = <0>;
clock-frequency = <33333333>;
compatible = "fixed-clock";
};
v_pl_disp_ch1_v_hdmi_tx_ss_0: drm-pl-disp-drv_0 {
/* Fill the fields xlnx,vformat based on user requirement */
compatible = "xlnx,pl-disp";
dma-names = "dma0";
dmas = <&ch1_v_frmbuf_rd_0 0>;
xlnx,vformat = "YUYV";
pl_display_port_ch1_v_hdmi_tx_ss_0: port@0 {
reg = <0>;
pl_disp_crtc_ch1_v_hdmi_tx_ss_0: endpoint {
remote-endpoint = <&hdmi_encoder_ch1_v_hdmi_tx_ss_0>;
};
};
};
v_pl_disp_ch4_v_hdmi_tx_ss_0: drm-pl-disp-drv_1 {
/* Fill the fields xlnx,vformat based on user requirement */
compatible = "xlnx,pl-disp";
dma-names = "dma0";
dmas = <&ch4_v_frmbuf_rd_0 0>;
xlnx,vformat = "YUYV";
pl_display_port_ch4_v_hdmi_tx_ss_0: port@0 {
reg = <0>;
pl_disp_crtc_ch4_v_hdmi_tx_ss_0: endpoint {
remote-endpoint = <&hdmi_encoder_ch4_v_hdmi_tx_ss_0>;
};
};
};
};
};
};

#include <dt-bindings/media/xilinx-vip.h>

/delete-node/ &v_pl_disp_ch1_v_hdmi_tx_ss_0;
/delete-node/ &v_pl_disp_ch4_v_hdmi_tx_ss_0;
/delete-node/ &ch1_vid_phy_controller_0;
/delete-node/ &ch4_vid_phy_controller_0;

/ {
ch1_v_drm_dmaengine_drv {
#address-cells = <1>;
#size-cells = <0>;
/* Fill the fields xlnx,vformat based on user requirement */
compatible = "xlnx,pl-disp";
dma-names = "dma0";
dmas = <&ch1_v_frmbuf_rd_0 0>;
xlnx,vformat = "BG24";
/*xlnx,vformat = "YUYV";*/
ch1_dmaengine_port: port@0 {
reg = <0>;
ch1_dmaengine_crtc: endpoint {
remote-endpoint = <&encoder_hdmi_port_ch1_v_hdmi_tx_ss_0>;
};
};
};

ch4_v_drm_dmaengine_drv {
#address-cells = <1>;
#size-cells = <0>;
/* Fill the fields xlnx,vformat based on user requirement */
compatible = "xlnx,pl-disp";
dma-names = "dma0";
dmas = <&ch4_v_frmbuf_rd_0 0>;
xlnx,vformat = "BG24";
/*xlnx,vformat = "YUYV";*/
ch4_dmaengine_port: port@0 {
reg = <0>;
ch4_dmaengine_crtc: endpoint {
remote-endpoint = <&encoder_hdmi_port_ch4_v_hdmi_tx_ss_0>;
};
};
};

ch1_vcap_hdmi {
compatible = "xlnx,video";
dma-names = "port0";
dmas = <&ch1_v_frmbuf_wr_0 0>;
ch1_vcap_hdmi_ports: ports {
#address-cells = <1>;
#size-cells = <0>;
ch1_vcap_hdmi_port: port@0 {
direction = "input";
reg = <0>;
ch1_vcap_hdmi_in: endpoint {
remote-endpoint = <&ch1_v_proc_csc_out>;
};
};
};
};

ch2_vcap_hdmi {
compatible = "xlnx,video";
dma-names = "port0";
dmas = <&ch2_v_frmbuf_wr_0 0>;
ch2_vcap_hdmi_ports: ports {
#address-cells = <1>;
#size-cells = <0>;
ch2_vcap_hdmi_port: port@0 {
direction = "input";
reg = <0>;
ch2_vcap_hdmi_in: endpoint {
remote-endpoint = <&ch2_v_proc_csc_out>;
};
};
};
};

ch3_vcap_hdmi {
compatible = "xlnx,video";
dma-names = "port0";
dmas = <&ch3_v_frmbuf_wr_0 0>;
ch3_vcap_hdmi_ports: ports {
#address-cells = <1>;
#size-cells = <0>;
ch3_vcap_hdmi_port: port@0 {
direction = "input";
reg = <0>;
ch3_vcap_hdmi_in: endpoint {
remote-endpoint = <&ch3_v_proc_csc_out>;
};
};
};
};


ch1_vid_phy_controller: vid_phy_controller@a00B0000 {
clock-names = "mgtrefclk0_pad_p_in", "mgtrefclk0_pad_n_in", "mgtrefclk1_pad_p_in", "mgtrefclk1_pad_n_in", "vid_phy_tx_axi4s_aclk", "vid_phy_rx_axi4s_aclk", "vid_phy_sb_aclk", "vid_phy_axi4lite_aclk", "drpclk";
clocks = <&misc_clk_2>, <&misc_clk_2>, <&misc_clk_2>, <&misc_clk_2>, <&misc_clk_0>, <&misc_clk_0>, <&zynqmp_clk 71>, <&zynqmp_clk 71>, <&zynqmp_clk 71>;
compatible = "xlnx,vid-phy-controller-2.2", "xlnx,vid-phy-controller-2.1";
interrupt-names = "irq";
interrupt-parent = <&gic>;
interrupts = <0x0 0x68 0x4>;
reg = <0x0 0xa00b0000 0x0 0x10000>;
xlnx,hdmi-fast-switch = <1>;
xlnx,input-pixels-per-clock = <2>;
xlnx,nidru = <0>;
xlnx,nidru-refclk-sel = <0>;
xlnx,rx-no-of-channels = <3>;
xlnx,rx-pll-selection = <0>;
xlnx,rx-protocol = <1>;
xlnx,rx-refclk-sel = <1>;
xlnx,transceiver-type = <5>;
xlnx,transceiver-width = <2>;
xlnx,tx-buffer-bypass = <1>;
xlnx,tx-no-of-channels = <4>;
xlnx,tx-pll-selection = <6>;
xlnx,tx-protocol = <1>;
xlnx,tx-refclk-sel = <0>;
xlnx,use-gt-ch4-hdmi = <1>;
vphy1_lane0: vphy_lane@0 {
#phy-cells = <4>;
};
vphy1_lane1: vphy_lane@1 {
#phy-cells = <4>;
};
vphy1_lane2: vphy_lane@2 {
#phy-cells = <4>;
};
vphy1_lane3: vphylane@3 {
#phy-cells = <4>;
};
};


ch4_vid_phy_controller: vid_phy_controller@a0030000 {
clock-names = "mgtrefclk0_pad_p_in", "mgtrefclk0_pad_n_in", "mgtrefclk1_pad_p_in", "mgtrefclk1_pad_n_in", "vid_phy_tx_axi4s_aclk", "vid_phy_rx_axi4s_aclk", "vid_phy_sb_aclk", "vid_phy_axi4lite_aclk", "drpclk";
clocks = <&misc_clk_2>, <&misc_clk_2>, <&misc_clk_2>, <&misc_clk_2>, <&misc_clk_0>, <&misc_clk_0>, <&zynqmp_clk 71>, <&zynqmp_clk 71>, <&zynqmp_clk 71>;
compatible = "xlnx,vid-phy-controller-2.2", "xlnx,vid-phy-controller-2.1";
interrupt-names = "irq";
interrupt-parent = <&gic>;
interrupts = <0 89 4>;
reg = <0x0 0xa0030000 0x0 0x10000>;
xlnx,hdmi-fast-switch = <1>;
xlnx,input-pixels-per-clock = <2>;
xlnx,nidru = <0>;
xlnx,nidru-refclk-sel = <0>;
xlnx,rx-no-of-channels = <3>;
xlnx,rx-pll-selection = <0>;
xlnx,rx-protocol = <1>;
xlnx,rx-refclk-sel = <1>;
xlnx,transceiver-type = <5>;
xlnx,transceiver-width = <2>;
xlnx,tx-buffer-bypass = <1>;
xlnx,tx-no-of-channels = <4>;
xlnx,tx-pll-selection = <6>;
xlnx,tx-protocol = <1>;
xlnx,tx-refclk-sel = <0>;
xlnx,use-gt-ch4-hdmi = <0>;
vphy4_lane0: vphy_lane@0 {
#phy-cells = <4>;
};
vphy4_lane1: vphy_lane@1 {
#phy-cells = <4>;
};
vphy4_lane2: vphy_lane@2 {
#phy-cells = <4>;
};
vphy4_lane3: vphylane@3 {
#phy-cells = <4>;
};
};


};

&ch1_v_hdmi_tx_ss_0 {
clock-names = "s_axi_cpu_aclk", "link_clk", "s_axis_audio_aclk", "video_clk", "s_axis_video_aclk", "txref-clk", "retimer-clk";
clocks = <&zynqmp_clk 71>, <&misc_clk_0>, <&zynqmp_clk 71>, <&misc_clk_1>, <&zynqmp_clk 72>, <&si5324_1 0>, <&dp159_1>;
phy-names = "hdmi-phy0", "hdmi-phy1", "hdmi-phy2";
phys = <&vphy1_lane0 0 1 1 1>, <&vphy1_lane1 0 1 1 1>, <&vphy1_lane2 0 1 1 1>;

hdmitx_ports_ch1_v_hdmi_tx_ss_0: ports {
#address-cells = <1>;
#size-cells = <0>;
encoder_hdmi_port_ch1_v_hdmi_tx_ss_0: port@0 {
reg = <0>;
hdmi_encoder_ch1_v_hdmi_tx_ss_0: endpoint {
remote-endpoint = <&ch1_dmaengine_crtc>;
};
};
};
};

 

&ch4_v_hdmi_tx_ss_0 {
clock-names = "s_axi_cpu_aclk", "link_clk", "s_axis_audio_aclk", "video_clk", "s_axis_video_aclk", "txref-clk", "retimer-clk";
clocks = <&zynqmp_clk 71>, <&misc_clk_0>, <&zynqmp_clk 71>, <&misc_clk_1>, <&zynqmp_clk 72>, <&si5324_4 0>, <&dp159_4>;
phy-names = "hdmi-phy0", "hdmi-phy1", "hdmi-phy2";
phys = <&vphy4_lane0 0 1 1 1>, <&vphy4_lane1 0 1 1 1>, <&vphy4_lane2 0 1 1 1>;

hdmitx_ports_ch4_v_hdmi_tx_ss_0: ports {
#address-cells = <1>;
#size-cells = <0>;
encoder_hdmi_port_ch4_v_hdmi_tx_ss_0: port@0 {
reg = <0>;
hdmi_encoder_ch4_v_hdmi_tx_ss_0: endpoint {
remote-endpoint = <&ch4_dmaengine_crtc>;
};
};
};
};


&ch2_vid_phy_controller_0 {
xlnx,use-gt-ch4-hdmi = <0>;
vphy2_lane0: vphy_lane@0 {
#phy-cells = <4>;
};
vphy2_lane1: vphy_lane@1 {
#phy-cells = <4>;
};
vphy2_lane2: vphy_lane@2 {
#phy-cells = <4>;
};
vphy2_lane3: vphylane@3 {
#phy-cells = <4>;
};
};

&ch3_vid_phy_controller_0 {
xlnx,use-gt-ch4-hdmi = <0>;
vphy3_lane0: vphy_lane@0 {
#phy-cells = <4>;
};
vphy3_lane1: vphy_lane@1 {
#phy-cells = <4>;
};
vphy3_lane2: vphy_lane@2 {
#phy-cells = <4>;
};
vphy3_lane3: vphylane@3 {
#phy-cells = <4>;
};
};


&ch1_v_hdmi_rx_ss_0 {
phy-names = "hdmi-phy0", "hdmi-phy1", "hdmi-phy2";
phys = <&vphy1_lane0 0 1 1 0>, <&vphy1_lane1 0 1 1 0>, <&vphy1_lane2 0 1 1 0>;
ch1_hdmirx_ports: ports {
#address-cells = <1>;
#size-cells = <0>;
ch1_hdmirx_port: port@0 {
reg = <0>;
ch1_hdmi_rx_out: endpoint {
remote-endpoint = <&ch1_v_proc_csc_in>;
};
};
};
};

&ch2_v_hdmi_rx_ss_0 {
phy-names = "hdmi-phy0", "hdmi-phy1", "hdmi-phy2";
phys = <&vphy2_lane0 0 1 1 0>, <&vphy2_lane1 0 1 1 0>, <&vphy2_lane2 0 1 1 0>;
ch2_hdmirx_ports: ports {
#address-cells = <1>;
#size-cells = <0>;
ch2_hdmirx_port: port@0 {
reg = <0>;
ch2_hdmi_rx_out: endpoint {
remote-endpoint = <&ch2_v_proc_csc_in>;
};
};
};
};

&ch3_v_hdmi_rx_ss_0 {
phy-names = "hdmi-phy0", "hdmi-phy1", "hdmi-phy2";
phys = <&vphy3_lane0 0 1 1 0>, <&vphy3_lane1 0 1 1 0>, <&vphy3_lane2 0 1 1 0>;
ch3_hdmirx_ports: ports {
#address-cells = <1>;
#size-cells = <0>;
ch3_hdmirx_port: port@0 {
reg = <0>;
ch3_hdmi_rx_out: endpoint {
remote-endpoint = <&ch3_v_proc_csc_in>;
};
};
};
};

&ch1_v_proc_ss_0 {
compatible = "xlnx,v-vpss-csc";
ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
xlnx,video-format = <XVIP_VF_RBG>;
xlnx,video-width = <8>;
ch1_v_proc_csc_in: endpoint {
remote-endpoint = <&ch1_hdmi_rx_out>;
};
};

port@1 {
reg = <1>;
xlnx,video-format = <XVIP_VF_YUV_420>;
xlnx,video-width = <8>;
ch1_v_proc_csc_out: endpoint {
remote-endpoint = <&ch1_vcap_hdmi_in>;
};
};
};
};

&ch2_v_proc_ss_0 {
compatible = "xlnx,v-vpss-csc";
ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
xlnx,video-format = <XVIP_VF_RBG>;
xlnx,video-width = <8>;
ch2_v_proc_csc_in: endpoint {
remote-endpoint = <&ch2_hdmi_rx_out>;
};
};

port@1 {
reg = <1>;
xlnx,video-format = <XVIP_VF_YUV_420>;
xlnx,video-width = <8>;
ch2_v_proc_csc_out: endpoint {
remote-endpoint = <&ch2_vcap_hdmi_in>;
};
};
};
};

&ch3_v_proc_ss_0 {
compatible = "xlnx,v-vpss-csc";
ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
xlnx,video-format = <XVIP_VF_RBG>;
xlnx,video-width = <8>;
ch3_v_proc_csc_in: endpoint {
remote-endpoint = <&ch3_hdmi_rx_out>;
};
};

port@1 {
reg = <1>;
xlnx,video-format = <XVIP_VF_YUV_420>;
xlnx,video-width = <8>;
ch3_v_proc_csc_out: endpoint {
remote-endpoint = <&ch3_vcap_hdmi_in>;
};
};
};
};

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Contributor
Contributor
1,594 Views
Registered: ‎12-21-2018

@eliezer wrote:
 Do I need to explicitly reference the fragment I want to modify when I am modifying or adding nodes, or is my formatting for the fragments themselves incorrect somehow?

Yes, I think you have to specify the fragment where you want your new nodes to go into (fragment@2 obviously)

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Explorer
Explorer
1,572 Views
Registered: ‎03-21-2019

Thanks, I'll try that out.

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Explorer
Explorer
1,423 Views
Registered: ‎03-21-2019

jeremy@easii-ic Explicitly including the overlays has allowed my project to build, but I still see errors when I load my overlay on my device.

 

My overlay includes things like this:

clocks = <&si5324>, <&dp159>

Which normally are references to other nodes, like so:

&i2c0 {

...

dp159 {

...

However, with a overlay, the two nodes (the ones that define these clocks and the nodes that need to reference them) are no longer in the same file. All of the i2c clock definitions are in system-user.dtsi, while the tx nodes that need to reference them are in pl-user.dtsi. Have you run into this issue before?

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