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Visitor aizkibel
Registered: ‎04-11-2019

Axi DMA problem (kernel hags out)


I have some problems using Xilinx AXI dma driver/block.

I'm using a ZYNQ z7030, Linux (modified by Analog) 4.14 and Vivado 2017.2. Also I tried with Vivado 2019.1.

The block design:




DMA Configuration:


Device tree is the following:


		axi_dma_0: dma@40400000 {
                       #dma-cells = <1>;
                       clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk";
         	  interrupt-parent = <&intc>;
                       interrupts = <0 29 4 0 30 4>;
                       clocks = <&clkc 15>, <&clkc 15>, <&clkc 15>, <&clkc 15>;
                       compatible = "xlnx,axi-dma-1.00.a";
                       reg = <0x40400000 0x10000>;
                       xlnx,addrwidth = <0x20>;
                       dma-channel@40400000 {
                               compatible = "xlnx,axi-dma-mm2s-channel";
                               dma-channels = <0x1>;
                       interrupt-parent = <&intc>;
                               interrupts = <0 29 4>;
                               xlnx,datawidth = <0x20>;
                               xlnx,device-id = <0x0>;

                       dma-channel@40400030 {
                               compatible = "xlnx,axi-dma-s2mm-channel";
                              dma-channels = <0x1>;
                       interrupt-parent = <&intc>;
                               interrupts = <0 30 4>;
                               xlnx,datawidth = <0x20>;
                               xlnx,device-id = <0x1>;


Kernel config:






Kernel hangs out during boot loading the DMA:


Starting kernel ...

Uncompressing Linux... done, booting the kernel.
Booting Linux on physical CPU 0x0
Linux version 4.14.0 (root@aizkibel) (gcc version 6.4.0 (Buildroot 2018.02.5)) #163 SMP PREEMPT Tue Aug 27 09:25:59 CEST 2019
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
OF: fdt: Machine model: TEST
bootconsole [earlycon0] enabled
Memory policy: Data cache writealloc
cma: Reserved 128 MiB at 0x07000000
random: fast init done
percpu: Embedded 15 pages/cpu @4fd8f000 s29772 r8192 d23476 u61440
Built 1 zonelists, mobility grouping on.  Total pages: 65024
Kernel command line: console=ttyPS0,115200 earlyprintk ip= CMA=25Mp=
PID hash table entries: 1024 (order: 0, 4096 bytes)
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
Memory: 118556K/262144K available (5120K kernel code, 128K rwdata, 988K rodata, 1024K init, 153K bss, 12516K reserved, 131072K cma-reserved, 0K highmem)
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
    vmalloc : 0x50800000 - 0xff800000   (2800 MB)
    lowmem  : 0x40000000 - 0x50000000   ( 256 MB)
    pkmap   : 0x3fe00000 - 0x40000000   (   2 MB)
    modules : 0x3f000000 - 0x3fe00000   (  14 MB)
      .text : 0x40008000 - 0x40600000   (6112 kB)
      .init : 0x40700000 - 0x40800000   (1024 kB)
      .data : 0x40800000 - 0x408202c0   ( 129 kB)
       .bss : 0x408202c0 - 0x40846814   ( 154 kB)
Preemptible hierarchical RCU implementation.
        RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
        Tasks RCU enabled.
RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
slcr mapped to 50800000
L2C: platform modifies aux control register: 0x72360000 -> 0x72760000
L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000
L2C-310 erratum 769419 enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 ID prefetch enabled, offset 1 lines
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001
zynq_clock_init: clkc starts at 50800100
Zynq clock init
ps_clk frequency not specified, using 33 MHz.
sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns
clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce07af025, max_idle_ns: 440795209040 ns
Switching to timer-based delay loop, resolution 3ns
clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 537538477 ns
timer #0 at 50808000, irq=17
Console: colour dummy device 80x30
Calibrating delay loop (skipped), value calculated using timer frequency.. 666.66 BogoMIPS (lpj=3333333)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
CPU: Testing write buffer coherency: ok
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x100000 - 0x10003c
Hierarchical SRCU implementation.
smp: Bringing up secondary CPUs ...
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
smp: Brought up 1 node, 2 CPUs
SMP: Total of 2 processors activated (1333.33 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
futex hash table entries: 512 (order: 3, 32768 bytes)
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
zynq-pinctrl 700.pinctrl: zynq pinctrl initialized
EDAC MC: Ver: 3.0.0
clocksource: Switched to clocksource arm_global_timer
NET: Registered protocol family 2
TCP established hash table entries: 2048 (order: 1, 8192 bytes)
TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
UDP hash table entries: 256 (order: 1, 8192 bytes)
UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
Trying to unpack rootfs image as initramfs...
Freeing initrd memory: 1844K
hw perfevents: no interrupt-affinity property for /pmu, guessing.
hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
workingset: timestamp_bits=30 max_order=16 bucket_order=0
io scheduler noop registered
io scheduler deadline registered (default)
io scheduler mq-deadline registered
io scheduler kyber registered

Removing the following lines in the DMA driver makes the kernel boot, but obviously the DMA doesn't work:


static int xilinx_dma_chan_reset(struct xilinx_dma_chan *chan)
	int err;

	/* Reset VDMA */
	err = xilinx_dma_reset(chan);
	if (err)
		return err;

	/* Enable interrupts */

	return 0;

So probably is something related with the interruptions, but I cannot find what... 

Any help is very welcome.... Thanks in advance.





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