04-19-2018 11:10 PM
I am attempting to build my own u-boot and boot.bin from the xilinx git repo https://github.com/Xilinx/u-boot-xlnx
I carefuly follow the instructions first placing the ps7_init_gpl.c and .h from my hdf file in the board directory (in this case the zc706)
I then run the make zynq_zc706_config to set up the XIlinx recommended config for the zc706 board
I then run make
This creates a u-boot.img in the top directory and a boot.bin file in the spl directory
Just like it says here: http://www.wiki.xilinx.com/U-Boot+Secondary+Program+Loader
I am using an SD card to boot
I put the boot.bin in the first partition along with the u-boot.img and my linux kernel image and my device tree
I insert the SD card in the slot and change the switch setting to boot from SD card and...
NOTHING it just hangs
If I take a boot.bin from somewhere else (the sample designs for instance) - all is good and things hand off to the u-boot without incident
My understanding is that the boot.bin generated by the u-boot-xlnx should be a FSBL-like image without the mess and bother of using bootgen and the SDK stuff. Am I wrong? Is there some trick to make the u-boot-xlnx flow generate a usable boot.bin?
04-19-2018 11:53 PM
04-20-2018 06:35 AM
The boot log has nothing in it. The system just doesn't boot. It's as if the boot.bin itself is not executable or is corrupt in some way
04-20-2018 07:48 AM
> Am I wrong? Is there some trick to make the
> u-boot-xlnx flow generate a usable boot.bin?
No, you're not wrong ... and there are no tricks. The flow you describe is sound.
> NOTHING it just hangs
So the spl output isn't even making it out of the console -- which means your ps7_init_gpl.c file is suspect. Or more correctly, your design doesn't quite match up with the reference. E.g. - in your design did you modify MIO? Clocks? DDR config? etc.
I recommend that you observe a successful boot with the default ps7_init files. If nothing else this will convince you that your flow is sound (which it appears to be), and the repetition will build some confidence. After that read through the config files (the 706 Kconfig & zynq-common.h) and the device tree source (zynq-zc706.dts) & make sure your design and the config/dts matches up.
04-20-2018 11:33 AM
Alas, Scott, that simple idea was most helpful.When I use the zc706 board default ps7_init_gpl.c the boot.bin is OK. So now I am reviewing the differences between the one supplied to me and the default one to see where the problem may be lurking.
04-20-2018 12:29 PM
I'm glad you have a working baseline. The first place I would look: the clocks and the MIO config for the uart. Since the spl is runs out of ocm you should see the early spl output even when other elements are not configured as expected (e.g. ddr, sdhc, etc).
Have a nice weekend!