08-14-2018 09:11 AM
I am trying to read data using a v4l2 driver. I believe I have configured correctly the vdma parameters(width, height, stride, etc) as the VDMA hw expects.
I see in examples from Xilinx SDK that other that frame parameters and enabling interrupts there is no much vdma configuration(using XAxiVdma API) before writing/reading data.
However after dmaengine_submit call I get the following error:
xilinx-vdma 43000000.dma: Cannot start channel 9f6dda10: 18831
It would appear that some of the errors are EOL or SOF but I don't think it should be the case.
What other settings should be configured before working with Xilinx VDMA?
08-16-2018 04:04 AM
Does anybody know possible reasons for getting DMA slave error: XILINX_DMA_DMASR_DMA_SLAVE_ERR ?
It seems is the only DMA error I get that makes the channel halt(the others are maskable)
In the vdma IP UG fromXilinx it is stated that the slave responds with SLVERR on memory map interface.
How could I figure out exactly why that happens?
08-17-2018 10:33 AM
08-27-2018 08:46 AM
Thanks for the advice. i tried that already but the vdmatest module is not loaded,. i have added in dts like the documnetion explains and vdma version is the same as the one in the driver, but the module is still not loaded.
08-29-2018 07:08 AM
I do not know how to run the vdmatest client actually:
I have the vdma node:
and looked at the vdmatest.c source but could not figure out how to run the test.