12-15-2018 11:53 AM
I have module with Xilinx Artix-7 XC7A35TFFG484-2 FPGA. It implements gaming specific functions such as Non Volatile Memory, UART(s), I2C(s), SPI(s), parallel I/O and interfaces them to the Host CPU via PCI Express bus. I need develop linux driver for suppot it module. I need any examples, or some describes the best way to do it.
12-15-2018 04:35 PM
Generally, these peripheral drivers already prepared as linux kernel drivers.
If you want to run linux on Artix 7 , I suggest learning device tree blob to use these peripherals.
12-26-2018 10:14 AM
AXI UART 16550 v2.0 pg143-axi-uart16550.pdf - document user guide. I see in Linux driver/tty/serial/uart_lite.c and driver/tty/serial/xilinx.c, but inside this drivers not such registegs and offsets:
0 0x1000 RBR RO Receiver Buffer Register
0 0x1000 THR WO Transmitter Holding Register
0 0x1004 IER R/W Interrupt Enable Register
x 0x1008 IIR RO Interrupt Identification Register
x 0x1008 FCR WO FIFO Control Register
1 0x1008 FCR RO FIFO Control Register
x 0x100C LCR R/W Line Control Register
x 0x1010 MCR R/W Modem Control Register
x 0x1014 LSR R/W Line Status Register
x 0x1018 MSR R/W Modem Status Register
x 0x101C SCR R/W Scratch Register
1 0x1000 DLL R/W Divisor Latch (Least Significant Byte) Register
1 0x1004 DLM R/W Divisor Latch (Most Significant Byte) Register
Where serial driver for AXI UART 16550 v2.0
01-03-2019 02:25 AM
UART 16550 is open source frequently used uart driver like serial 8250 Driver
so driver code is available in open source ,
Required action item is, Interface this driver with AXI Bus which you can take existing driver already interfaced with AXI bus,
It is basically requires to
1. Add the Node in .dtsi file with Reg. Base address,size of reg .size, Interrupt no, Clock frequency,compitable name
2.. add compatible Id in the uart platform driver code
3. allocate memory for Uart driver through Kernel normal zone (GFP_KERNEL)
4. Provide in Probe function, platform_get_request_region() , ioremap function.
5. Use platform bus (static struct uart_driver <driver name>)
with these basic settings, UART driver will be identified by AXI Bus.
Provide Kudos, if you are happy with the Reply
Thanks & Regards
01-03-2019 03:10 AM
The register map is seen on page 12:
There are drivers that exist for this IP, that should be enabled by default in Petalinux.
However, as with any IP, you could create your own. The easiest way would be to use the UIO and make your mods here