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Registered: ‎02-08-2019

Is using PL 2019.2 to build image for Avnet Ultra96-v2 straightforward?

Hopefully trivial question -- I've been asked to give an intro seminar on PetaLinux 2019.2 in terms of setting it up and building a bootable image for the Avnet Ultra96-v2:

The seminar won't cover any part of the FPGA process -- I would just grab the Xilinx-provided system.xsa file from here (it's a PetaLinux seminar, not a Vivado seminar):

Are there any potential issues with this plan? It *seems* really straightforward -- I've got PL 2019.2 running on a Ubuntu dev host, so is there anything that could go wrong? I'm assuming others have done this so just wondering about possible trip-ups.


P.S. A number of people have asked me for recommendations for a starter, entry-level ZynqMP eval kit, and I can't think of any better recommendation than the Ultra96-v2, given that Xilinx's boards (ZCU10*) while clearly more feature-filled, are noticeably pricier. So just to get one's feet wet, is there any other eval board one could suggest? I've looked around and haven't found any other viable possibilities.

P.P.S. This seminar might even turn into a course if things go well.

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Registered: ‎11-09-2015

HI @rpjday 

Yes the pre-build HDF should be fine. I do not see any issue with it.

Just note that if you start with that you will not have any board specific configurations in the petalinux project. Only the fpga is properly configured.

A good place to start for a board is usually from the BSP:

And yes, for me the Ultra96 board is the best board to start with ZynqMP

Product Application Engineer - Xilinx Technical Support EMEA
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