After upgrade to 2019.1 I noticed the following error.
[ 1.543817] zynqmp_pll_disable() clock disable failed for dpll_int, ret = -13
The reason is because I don't use any of the available clocks on the dpll when looking at clk_summary
dpll_post_src 0 0 0 33333333 0 0 50000
dpll_pre_src 0 0 0 33333333 0 0 50000
dpll_int 0 0 0 2399999976 0 0 50000
dpll_half 0 0 0 1199999988 0 0 50000
dpll_int_mux 0 0 0 1199999988 0 0 50000
dpll 0 0 0 1199999988 0 0 50000
gpu_ref_mux 0 0 0 1199999988 0 0 50000
gpu_ref_div1 0 0 0 599999994 0 0 50000
gpu_ref 0 0 0 599999994 0 0 50000
gpu_pp1_ref 0 0 0 599999994 0 0 50000
gpu_pp0_ref 0 0 0 599999994 0 0 50000
sata_ref_mux 0 0 0 1199999988 0 0 50000
sata_ref_div1 0 0 0 99999999 0 0 50000
sata_ref 0 0 0 99999999 0 0 50000
dpdma_ref_mux 0 0 0 1199999988 0 0 50000
dpdma_ref_div1 0 0 0 599999994 0 0 50000
dpdma_ref 0 0 0 599999994 0 0 50000
gdma_ref_mux 0 0 0 1199999988 0 0 50000
gdma_ref_div1 0 0 0 599999994 0 0 50000
gdma_ref 0 0 0 599999994 0 0 50000
dp_video_ref_mux 0 0 0 1199999988 0 0 50000
dp_video_ref_div1 0 0 0 119999999 0 0 50000
dp_video_ref_div2 0 0 0 119999999 0 0 50000
dp_video_ref 0 0 0 119999999 0 0 50000
dpll_to_lpd 0 0 0 399999996 0 0 50000Though is the dpll used for the ddr controller. But the ddr controller is not part of the clk tree?
For now I have created the following in the device tree
/* Force dpll on - This removes the error
"zynqmp_pll_disable() clock disable failed for dpll_int, ret = -13"
when booting 2019.1. It is a hack to use the fclk module to
always enable it. */
/ {
dpllClk: dpllClk {
status = "okay";
compatible = "xlnx,fclk";
clocks = <&zynqmp_clk 3>;
};
};So I "misuse" the xlnx,fclk hack for this also, so this remove the error, and when looking at clk_summary
dpll_post_src 0 0 0 33333333 0 0 50000
dpll_pre_src 1 1 0 33333333 0 0 50000
dpll_int 1 1 0 2399999976 0 0 50000
dpll_half 1 1 0 1199999988 0 0 50000
dpll_int_mux 1 1 0 1199999988 0 0 50000
dpll 1 1 0 1199999988 0 0 50000
gpu_ref_mux 0 0 0 1199999988 0 0 50000But Xilinx. Please for the 2019.2 fix it, so I don't need to use this hack, but it just see that dpll is used for the ddr controller, and only tries to disable it if it not used.
