UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor leonliu
Visitor
389 Views
Registered: ‎06-05-2018

Petalinux 2018.3 fsbl boot, DRAM and Flash

We recently updated from Vivado 2018.2 to Vivado 2018.3. Yeah, we have to with knowing that as a risk.

We use petalinux-config <hdf file path> to configure and make new fsbl etc. docs. The new fsbl.elf hang immediately without any print. With the XFSBL_DEBUG option open, it shows the DDR_INIT failed. We find that code in xfsbl_initilization.c. That's totally new code in release 2018.3 and that is initializing DRAM as the 2nd time. I have to comment out that for debugging. 

Also, the flash configuration in config disappeared. So, we have to do all of these things manually. After that petalinux-config still CAN'T recognize the new config file. 

We end up to use 2018.2 fsbl.elf as a temporary solution. 

Could anyone share your success story of release 2018.3 fsbl? 

0 Kudos
2 Replies
Visitor fremen
Visitor
356 Views
Registered: ‎03-14-2018

Re: Petalinux 2018.3 fsbl boot, DRAM and Flash

Hi,

I don't know if it can help but when I tried to use our project with Petalinux 2018.3 it failed.

I had to create a new project under Petalinux 2018.3, merge our stuff in and build.

(Our project was initially created under Petalinux 2018.1 and converted to 2018.2).

But FSBL is working fine...

(Only issue, for us, is the phy driver.  It is now using a generic one instead of the manufacturer one).

 

0 Kudos
Visitor leonliu
Visitor
338 Views
Registered: ‎06-05-2018

Re: Petalinux 2018.3 fsbl boot, DRAM and Flash

Thanks.

I tried that trick of creating a brand new project and then merge in, it didn't work for me. 

The root cause of that DRAM error comes from the second time DRAM initialization which is NEW code in 2018.3. So, I just commented out. Since there are some many other new codes. I temporarily use 2018.2 FSBL for now because I have more important tasks to handle.

We used Fidus board instead of zcu102 which is the default for a zynpMP project.  

 

0 Kudos