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Voyager
Voyager
1,160 Views
Registered: ‎06-26-2015

Petalinux driver for AXI Interrupt Controller core

is there example code or guide on how to implement petalinux interrupt.  I have a custom ip that's using axi_lite connect to ARM-Zynq.  it can read register in polling mode but how do I send interrupt from my custom ip to ARM when my internal register updated from my other FPGA cores?  so the CPU doesn't need loop to check its register status, and only do so when register is changed.

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5 Replies
Adventurer
Adventurer
1,136 Views
Registered: ‎10-04-2017

Re: Petalinux driver for AXI Interrupt Controller core

Petalinux is a build system so has nothing to do with the interrupt. You need to connect the interrupt out to the IRQ_F2P port on the ARM. The ARM can only handle one interrupt so you have to use a concat block if you have multiple interrupt sources already.
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Voyager
Voyager
1,114 Views
Registered: ‎06-26-2015

Re: Petalinux driver for AXI Interrupt Controller core

I mean the c code application to use that IRQ port that I connected in FPGA
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Voyager
Voyager
1,099 Views
Registered: ‎06-26-2015

Re: Petalinux driver for AXI Interrupt Controller core

also the IRQ signal how long the FPGA has to hold high for IRQ to pass through 1 clk, or longer?
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Adventurer
Adventurer
1,088 Views
Registered: ‎10-04-2017

Re: Petalinux driver for AXI Interrupt Controller core

To see the interrupt in userspace without writing a kernel driver you will need to enable UIO in the kernel and change the compat string for you IP in the devicetree. Then you can write a C app in userspace to get the interrupt.
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Voyager
Voyager
1,052 Views
Registered: ‎06-26-2015

Re: Petalinux driver for AXI Interrupt Controller core

any example of such C app?
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