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DgN
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Registered: ‎09-14-2020

Petalinux driver to communicate with the AXI Interconnect

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Hi,

 

I'm trying to have a C program running on Petalinux send AXI requests (read/write) to an AXI slave (on PL side) connected to Xilinx's AXI interconnect. Is there a way to do so ?

boards : ZCU102 and ZCU104 


EDIT

For clarification. I just need to send request as a master. I can't believe the Zynq Ultrascale+ MPSoC does provide AXI master interfaces but it can't be accessed by software.

What I really want is described in post #M45705


Thanks,

N.

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patocarr
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Registered: ‎01-28-2008

Hi @DgN 

  Still not sure what's different between what you want to do, to what was proposed.

[from software]

ask for read or write with parameters : address ( and data for write)

  This part is done by the Zynq subsystem (i.e. CPU) that directs the request to one of its master AXI interfaces to the fabric.

[driver or solution]

  The /dev/mem or UIO driver is in charge of moving the request from user space to kernel space and to the hardware.

[Hardware]

- Master interface initiates AXI request

  This is the AXI Master from the Zynq subsystem (i.e. M_AXI_HPM0_FPD) to fabric.

- Axi interconnect's slave interacts with the request and redirect the request to my IP (slave)

  The AXI interconnect merely directs the request on its AXI slave interface to the proper AXI master interface as programmed in the address editor.

- IP interacts with the request, meaning its registers are not accessed by user. Those are accessed through the axi communication.

  This section of your explanation is the most confusing. What's the difference between "interacts with the request" and "accessed through AXI communication"?

  The AXI slave should always respond to a valid AXI transaction, either to OK or respond with some error, such as SLVERR.

  Care to explain further?

 

Thanks,

-Pat


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patocarr
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Registered: ‎01-28-2008

Hi @DgN 

  There's a few ways to access the memory space of an AXI slave component. The simplest is to use the /dev/mem character device to map the slave's memory range into user space. The best example for this is in Petalinux as the peekpoke app.

  The other way is to define your AXI slave in the device tree and use UIO compatible property on it, so you can access it using the generic-uio driver. I've posted an article on my blog Linux-Userspace about this recently.

Thanks,

-Pat

 

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DgN
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Registered: ‎09-14-2020

Hi @patocarr, Thank you for your answer.

This sounds like a solution to access the slave. Though I'm trying to make request as a master.

The first solution I can see from your answer is to make a dummy master that would issue requests according to some control registers (and access those in one of the ways you described).

I wanted to know if there were a more direct solution

Thanks,

N.

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DgN
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Registered: ‎09-14-2020

I edited the first post for clarification :

I've seen many solution, using the /dev/mem, generic UIO devices, using DMA AXI. Those have something in common : they directly access slave's memory. That is not what I want to do. what I really want is :

 

[from software]

ask for read or write with parameters : address ( and data for write)

 

[driver or solution]

??

 

[Hardware]

- Master interface initiates AXI request

- Axi interconnect's slave interacts with the request and redirect the request to my IP (slave)

- IP interacts with the request, meaning its registers are not accessed by user. Those are accessed through the axi communication.

 

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patocarr
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Teacher
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Registered: ‎01-28-2008

Hi @DgN 

  Still not sure what's different between what you want to do, to what was proposed.

[from software]

ask for read or write with parameters : address ( and data for write)

  This part is done by the Zynq subsystem (i.e. CPU) that directs the request to one of its master AXI interfaces to the fabric.

[driver or solution]

  The /dev/mem or UIO driver is in charge of moving the request from user space to kernel space and to the hardware.

[Hardware]

- Master interface initiates AXI request

  This is the AXI Master from the Zynq subsystem (i.e. M_AXI_HPM0_FPD) to fabric.

- Axi interconnect's slave interacts with the request and redirect the request to my IP (slave)

  The AXI interconnect merely directs the request on its AXI slave interface to the proper AXI master interface as programmed in the address editor.

- IP interacts with the request, meaning its registers are not accessed by user. Those are accessed through the axi communication.

  This section of your explanation is the most confusing. What's the difference between "interacts with the request" and "accessed through AXI communication"?

  The AXI slave should always respond to a valid AXI transaction, either to OK or respond with some error, such as SLVERR.

  Care to explain further?

 

Thanks,

-Pat


Give kudos if helpful. Accept as solution if it solves your problem.
https://tuxengineering.com/blog

View solution in original post

DgN
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Registered: ‎09-14-2020

hi @patocarr,

 

Thank you for clarifying. I thought accessing the memory with /dev/mem (or UIO) wouldn't happen through the AXI slave interface but with a parallel method. Thus I think there are actually no differences between what I was asking and what you are suggesting. 

 

Thanks,

N.

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