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Registered: ‎09-01-2018

Porting the AXI4 Lite to JTAG core to work with GDB?

I'm targeting a board with a Xilinx FPGA that doesn't have an external JTAG connector. On this FPGA there is a processor and a bunch of other things. There will be a need for software to debug firmware running in the FPGA.

I'm the HW engineer, and I'd like to set up the FPGA so that the software people can use GDB to debug the processor.

What does it take to make GDB understand a JTAG device such as the AXI2JTAG core?

GDB would be running on the host system, and talking to the AXI2JTAG over PCIE (XDMA core, AXI-lite port)

The source for the core is this application note, which enables Xilinx JTAG useage, but I don't think I can debug a processor using this.

https://www.xilinx.com/support/documentation/application_notes/xapp1251-xvc-zynq-petalinux.pdf

Has anyone done this?

Anyone with an idea as to how hard or easy this is?

 

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