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Observer
Observer
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Registered: ‎12-03-2018

Problem building Petalinux HDMI RX example design from scratch

Hi

I am trying to create an linux application on ZCU106 using the HDMI RX SS IP example and petalinux. I know there is working prebuilt examples from this but as our final solution will need a custom hardware setup i need to find the workflow from hardware creation in Vivado to building a linux version which has the capability to use this hardware. The final project will consist of multiple HDMI input streams, some videoprocessing cores(both own and Xilinx cores), a VCU for compression and a network interface for streaming out these compressed streams. My workflow so far is:

VIVADO

  1. IP Catalog -> HDMI RX SS (Set example design as RX)
  2. Generate Output Products (Global setting)
  3. Open IP-Example
  4. Synthesis
  5. Implementation
  6. Generate Bitstream
  7. Export hardware (Include Bitstream)

 

PETALINUX

  1. petalinux-create -t project -s xilinx-zcu106-v2019.1-final.bsp
  2. petalinux-config --get-hw-description=/path_to_hdf_from_above
  3. petalinux-config -c rootfs
    1. add filesystem packages -> misc -> hdmi-module -> kernel-module-hdmi
  4. petalinux-build
  5. petalinux-package --boot --fsbl <fsbl from /images/linux> --fpga <FPGA bitstream from /images/linux> --u-boot --force
  6. petalinux-boot --jtag --kernel --fpga (takes about 25-30min)
  7. also tried booting from SD Card (creating 1GB partition “boot” with FAT32 and 4GB or more partition “rootfs” with ext4. Then copies image.ub and BOOT.bin to “boot” and extract rootfs to “rootfs” using:

$ sudo dd if=rootfs.ext4 of=/dev/sdX2

$ sync

(I am aware of the different switch settings using jtag and SD card)

The device boots and i am able to login. However when i run dmesg i can clearly see that there has been problems in initializing the vphy and hdmi rx core from the following lines:

[ 4.025023] xilinx-video amba_pl@0:vcap_hdmi: /amba_pl@0/vcap_hdmi/ports/port@0 initialization failed
[ 4.033740] xilinx-video amba_pl@0:vcap_hdmi: DMA initialization failed
[ 4.041771] usbcore: registered new interface driver uvcvideo

[ 6.906115] mali: loading out-of-tree module taints kernel.
[ 6.971376] xilinx-vphy 80050000.vid_phy_controller: probed
[ 6.977525] xilinx-vphy 80050000.vid_phy_controller: failed to get the nidru clk.
[ 6.993088] xilinx-vphy: probe of 80050000.vid_phy_controller failed with error -2
[ 7.008745] xlnx-drm-hdmi 80020000.v_hdmi_tx_ss: probed
[ 7.014046] xlnx-drm-hdmi 80020000.v_hdmi_tx_ss: hdmi tx audio disabled in DT
[ 7.014338] xilinx-hdmi-rx 80000000.v_hdmi_rx_ss: probed
[ 7.021213] xlnx-drm-hdmi 80020000.v_hdmi_tx_ss: xvphy not ready -EPROBE_DEFER
[ 7.040765] xilinx-hdmi-rx 80000000.v_hdmi_rx_ss: xvphy not ready -EPROBE_DEFER

The full dmesg log is attached.

 

I am wondering how to proceed? Hopefully someone have done this before me and sees what i have missed out on. Im not expecting anyone to hold my hand but a push in the right direction would be much appreciated. From googling and searching i can see that there is a lot of people having errors in their device trees. I have attached the generated device tree but can’t seem to find obvious errors. Are there any known configuration in petalinux-config im missing out on?

I have been searching google a lot for answers and read parts of the UG1144 (v2019.1) PetaLinux Tools Documentation Reference Guide aswell as these examples: 

  1. https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841884/Xilinx+V4L2+hdmirx+driver
  2. https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842436/Zynq+UltraScale+MPSoC+-+ZCU106+HDMI+Example+Design.

 

I have been able to run the 1. prebuilt images on the ZCU working correctly. I have tried to dig into this example to try to discover what im doing wrong with no luck.

Looking forward to your replies

Kind regards,

Espsea

 

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Moderator
Moderator
756 Views
Registered: ‎12-04-2016

Hi @espsea 

I have one suggestion on comparing device tree entries in working & non-working case.

Decompile the system.dtb to dts of working and non-working

Please note that you can extract the system.dtb from the working image.ub using this command:

dumpimage -T flat_dt -p 1 -i image.ub system.dtb

I suspect some issues with clocking to oscillators

 

Best Regards

Shabbir

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Moderator
Moderator
739 Views
Registered: ‎11-09-2015

Hi @espsea 

I would recommend starting with the HDMI FrameBuffer Example Design 2019.1. This is the design which is used to validate the HDMI solution under linux


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Observer
Observer
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Registered: ‎12-03-2018

Hi,

thank you for your replies.

Nice tip!

I will try this as soon as im back at the office

to see if i can detect any problems.

 

I have actually been testing that HDMI example aswell. I rebuilt the BD

for ZCU106 in Vivado and followed the same procedure as i mentioned above with no luck.

I dont recall if i got the same errors as i mention above here but i will retest as soon as im back at the office and see.

 

Kind Regards,

Espsea

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Observer
Observer
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Registered: ‎12-03-2018

Hi again,

I did use the HDMI FrameBuffer Example Design 2019.1 and imported my hdf generated from rebuilding the example for ZCU106 in Vivado using:

petalinux-config --get-hw-description=/path_to_zcu106_hdf

then i built the project

petalinux-build

lastly i packaged the project using this command:

petalinux-package --boot --fsbl images/linux/zynqmp_fsbl.elf --fpga images/linux/system.bit --u-boot images/linux/u-boot.elf --pmufw images/linux/pmufw.elf --force

Copied image.ub and boot.BIN to sd card boot partition and unzipped rootfs.tar.gz in rootfs partition. I booted and got the same error as before(attached log file) . I suspect the problem being with the Vivado project itself as it seems linux have problems finding multiple clocks from pl.

[ 6.632166] xilinx-frmbuf 80010000.v_frmbuf_rd: failed to get ap_clk (-517)
[ 6.637434] xilinx-frmbuf 80040000.v_frmbuf_wr: failed to get ap_clk (-517)

[ 13.205305] xilinx-vphy 80050000.vid_phy_controller: failed to get the nidru clk

Can i be sure that the PL is actually programmed during boot by using the steps above? I will start by looking into the Vivado project but any tips on how to proceed is appreciated.

 

Kind Regards,

Espsea

 

 

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Moderator
Moderator
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Registered: ‎11-09-2015

Hi @espsea 

The video frame buffer might not be probed at all if the PL was not programmed.

But you might want to check if the clock is active


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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