I am seeing weird behavior in the tsu_timer registers of the Zynq Ultrascale+ that uses the DP83867CRRGZR Ethernet PHY.
According to the register reference, the tsu_timer_nsec register should hold the nanoseconds timer, and the tsu_timer_sec register (and tsu_timer_msb_sec) should hold the seconds timer.
However, what I am seeing is that the tsu_timer_nsec register remains empty (0x00000000) and the tsu_timer_sec register contains a combination of seconds and nanoseconds. For example, if I poll the tsu_timer_sec register (approximately) once every second, I see an output similar to the following:
These values also match the values read from emio_enet0_enet_tsu_timer_cnt[93:0].
When I run ptp4l, the zynq clock fails to synchronize with the grand master clock, and I see similar bahavior on the tsu_ptp_tx and tsu_ptp_rx registers (_sec register increments by ~ 0x10000000 every second, and _nsec register remains empty).