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Observer
Observer
799 Views
Registered: ‎09-09-2016

Watchdog / reset Zynq after a secure boot

Hi,

It seems quiet impossible to perform a Zynq reset after a secure boot. If u-boot or Linux set the system RST register bit the zynq seem to go in lockdown mode and to not reload boot memory (containing FSLB, bitstream and u-boot).

That make Watchdog pretty useless in secureboot as zynq is made stun.

 

Is there a way to perform a full Zynq reset after a secure boot, with an other way than to control POR_B with an external/gpio signal ?

 

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Xilinx Employee
Xilinx Employee
788 Views
Registered: ‎08-01-2008

 

@s-meunier

To trigger fallback or multibot in secure boot mode with EFUSE, you have to comment out the system reset section in FSBL.

Please refer to "Secure Fallback Flow with eFUSE" section of http://www.xilinx.com/support/documentation/user_guides/ug821-zynq-7000-swdev.pdf for details on how to do this.

Thanks and Regards
Balkrishan
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Observer
Observer
775 Views
Registered: ‎09-09-2016

@balkris

When I want to reset device I'm no more in uboot but in Linux.

My problem is not to make a multiboot or a fallback boot but when I'm in Linux to be able to fully restart the device , by the Linux watchdog that use the PS watchdog (or by command).

Regards

 

 

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