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Participant miloserdin
Participant
900 Views
Registered: ‎02-20-2016

Zynq UltraScale GEM with PS-GTR SGMII doesn't work

Hi!

I'm working with Zynq UltraScale+ MPSoC. I'd like to use GEM3 Ethernet controller with PS GTR transceivers using SGMII in Linux.

Is there any way to bind GEM3 Ethernet controller with ZynqMP serdes Linux device driver using device tree?

Here is my device tree snippet:

 

       ethernet@ff0e0000 {
            compatible = "cdns,zynqmp-gem";
            status = "okay";
            interrupt-parent = <0x4>;
            interrupts = <0x0 0x3f 0x4 0x0 0x3f 0x4>;
            reg = <0x0 0xff0e0000 0x0 0x1000>;
            clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
            #address-cells = <0x1>;
            #size-cells = <0x0>;
            #stream-id-cells = <0x1>;
            iommus = <0xa 0x877>;
            power-domains = <0x12>;
            clocks = <0x3 0x1f 0x3 0x34 0x3 0x30 0x3 0x34 0x3 0x2c>;
            pinctrl-names = "default";
            pinctrl-0 = <0x13>;
            phy-mode = "moca";
            xlnx,ptp-enet-clock = <0x0>;
            local-mac-address = [00 0a 35 00 22 01];
            phys = <0x14 0x6 0x3 0x1 0x7735940>;
            is-internal-pcspma;

            fixed-link {
                speed = <0x3e8>;
                full-duplex;
            };
        };
 

...

 

        zynqmp_phy@fd400000 {
            compatible = "xlnx,zynqmp-psgtr-v1.1";
            status = "okay";
            reg = <0x0 0xfd400000 0x0 0x40000 0x0 0xfd3d0000 0x0 0x1000>;
            reg-names = "serdes", "siou";
            nvmem-cells = <0x22>;
            nvmem-cell-names = "soc_revision";
            resets = <0x23 0x10 0x23 0x3b 0x23 0x3c 0x23 0x3d 0x23 0x3e 0x23 0x3f 0x23 0x40 0x23 0x3 0x23 0x1d 0x23 0x1e 0x23 0x1f 0x23 0x20>;
            reset-names = "sata_rst", "usb0_crst", "usb1_crst", "usb0_hibrst", "usb1_hibrst", "usb0_apbrst", "usb1_apbrst", "dp_rst", "gem0_rst", "gem1_rst", "gem2_rst", "gem3_rst";

            lane0 {
                #phy-cells = <0x4>;
            };

            lane1 {
                #phy-cells = <0x4>;
                linux,phandle = <0x38>;
                phandle = <0x38>;
            };

            lane2 {
                #phy-cells = <0x4>;
                linux,phandle = <0x34>;
                phandle = <0x34>;
            };

            lane3 {
                #phy-cells = <0x4>;
                linux,phandle = <0x14>;
                phandle = <0x14>;
            };
        };
 

This setting for GEM3 Ethernet controller doesn't work

phys = <&lane3 6 3 1 125000000>.

 

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8 Replies
442 Views
Registered: ‎06-11-2019

Re: Zynq UltraScale GEM with PS-GTR SGMII doesn't work

Didi u manage to get gem3 works? 

0 Kudos
Moderator
Moderator
436 Views
Registered: ‎09-12-2007

Re: Zynq UltraScale GEM with PS-GTR SGMII doesn't work

Is this uboot or linux? Can you show the boot log?

0 Kudos
424 Views
Registered: ‎06-11-2019

Re: Zynq UltraScale GEM with PS-GTR SGMII doesn't work

Hello, it's linux. 

I have a problem to show the log file, but we try to use gem3 as via  gtlane 3 as sgmii directly to sfp, we got eth3 won't found, we tried everything, fixed link, full duplex, disable auto negotiations, always the same...

I saw the post above and wonder if someone actually succeeded to get gem3 works without phy, directly to mac to sfp+ with sgmii. 

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Moderator
Moderator
421 Views
Registered: ‎09-12-2007

Re: Zynq UltraScale GEM with PS-GTR SGMII doesn't work

0 Kudos
419 Views
Registered: ‎06-11-2019

Re: Zynq UltraScale GEM with PS-GTR SGMII doesn't work

Thanks, we already tried this, we saw this post. Still the same... 

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Moderator
Moderator
403 Views
Registered: ‎09-12-2007

Re: Zynq UltraScale GEM with PS-GTR SGMII doesn't work

Can you do an mii dump in u-boot? also,can you share the bootlog?

0 Kudos
399 Views
Registered: ‎06-11-2019

Re: Zynq UltraScale GEM with PS-GTR SGMII doesn't work

The gem3 is connect directly to the sfp with sgmii, we don't have mdio line to preform mii dump... 

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Moderator
Moderator
388 Views
Registered: ‎09-12-2007

Re: Zynq UltraScale GEM with PS-GTR SGMII doesn't work

can you do a ifconfig? do you see the rx and tx counters incr?

Can you dump the GEM network config registers for your respective GEM:

0xFF0B0004 (GEM0)
0xFF0C0004 (GEM1)
0xFF0D0004 (GEM2)
0xFF0E0004 (GEM3)

Also, the PCS control:

0xFF0B0200 (GEM0)
0xFF0C0200 (GEM1)
0xFF0D0200 (GEM2)
0xFF0E0200 (GEM3)

 

Can you try a GTR loopback, and do a ifconfig (do you see tx and tx counter increment)

For GEM0:

mw 0xfd410038 0x00000001

For GEM1:

mw 0xfd410038 0x00000010

For GEM2:

mw 0xfd41003c 0x00000001

For GEM3:

mw 0xfd41003c 0x00000010

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