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Registered: ‎07-22-2018

Zynq Ultrascale+ Petalinux 2018.3 TI DP83867 RGMII phy only working at 10 Mbit/s, not 100 and 1000 Mbit/s


I have a custom RFSoC board that I'm booting Petalinux 2018.3 from QSPI.  I did not have a .bsp file for this board, so I created my Petalinux project based on the ZCU102 template.  I'm able to boot and get most of the interfaces up and running, but am having an issue with the eth0 RGMII phy interface.  I set the IP address to a fixed IP in Petalinux and boot with a direct connection to my laptop's NIC which is 10/100/1000 and set to auto-negotiation.  After boot it says that eth0: link is not ready.  If I disable auto-neg on the Zynq side and set the speed to 10 Mbits/s, the link becomes ready.

The phy chip is the TI DP83867IRPAP and I've used the ZCU111 .dtsi settings in my system-user.dtsi file.  I've tried various combinations of the rx and tx clock delay settings in the .dtsi file (rx and tx delays both 0, 4, 8, 12), but am not able to get anything other than 10 Mbit/s operation from eth0.  I've also tried swapping ethernet cables, and have verified my laptop's NIC works at 1000 Mbit/s.

Also, I have verified the DP83867's extended register settings after boot using XSCT.  It appears the strapping modes are set correctly and the tx and rx delays are getting set correctly based on the system-user.dtsi values.

I've attached my UART output during boot as well as my system-user.dtsi file.  Does anyone have any suggestions for how to troubleshoot this issue or see something I'm doing wrong?