06-14-2013 12:57 PM
I'm currently trying to figure out how to program the FPGA after a non-JTAG Linux boot. In the UG873 14.5 CTT guide http://forums.xilinx.com/xlnx/attachments/xlnx/zingboard/11/1/ug873-zynq-ctt.pdf (p. 66) it mentions that the Zync PS will become unresponsive after programming the FPGA once Linux has already booted (which it does for me after an SD card or QSPI Flash boot). The guide then links an answer record 55150, which seems to not exist anymore. Does anyone know how to program the FPGA with a bitstream after a non-JTAG boot?
I've looked around and have not found a clear answer to this problem. If it helps, when I was investigating using "cat proc/mtd" I found that there was a listed "qspi-bitstream" as a mtd4 device, and I'm thinking that this could lead to a possible solution.
06-15-2013 12:07 AM - edited 06-15-2013 12:09 AM
A bitstream can be programmed at any stage during boot.
1. Include the bitstream in your boot.bin. In that case the FSBL will program the PL (I don't have a link to instructions for this case, but I assume it's covered somewhere).
2. Program the PL from U-Boot: The wiki has a guide which can easily be transferred to QSPI-, SD-, ... boot scenarios: http://www.wiki.xilinx.com/Zynq+AP+SoC+-+Programmable+Logic+Configuration+via+Ethernet
3. Program the PL from Linux: In Linux you can simply cat a bitstream to /dev/xdevcfg to program a bitstream. Though, as in the U-Boot case, the bistream needs to be provided in a specific format. Please refer to the wiki guide above for instructions to convert the .bit file.
More info on this option:
07-27-2013 08:29 AM
For the 2nd method you mentioned that PL could be programmed by U-boot from a TFTP server. I think there should be a Ethernet between TFTP server and target board. But how does the ethernet exist before the PL is configured from TFTP server? Thank you.
07-27-2013 09:14 AM
1. Ethernet is just an example for how to move a bitstream into memory, so U-Boot can program it into the PL. You could hold the bitstream on any other supported storage and load it from there into memory and program it.
2. Zynq is a full bown SoC with a lot of hard IP blocks. Amongst others two ethernet blocks. You can use all PS features w/o even touching the PL. There is no dependency on any bitstream in order to use PS Ethernet.