UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Participant btsavage
Participant
8,382 Views
Registered: ‎11-09-2015

device tree help

I have seen some confusing threads on this topic, but nothing seems to work for me.  I am using Vivado 2015.3 and the ZC706 evaluation board.

The first step was to start with a simple design, just the base zynq processor, no pl.  I exported the hardware to the SDK and built the device tree and the BOOT.bin.  This boots and loads my kernel.

 

I then added UART0 to the HW and connected it via PL to the PMOD header.  The HW was exported to the SDK and the same process as above was repeated, only the PL was incorporated.  The boot process now hangs at Starting Kernel. 

 

Any help is greatly appreciated.

0 Kudos
12 Replies
Xilinx Employee
Xilinx Employee
8,381 Views
Registered: ‎09-10-2008

Re: device tree help

Hi,

 

Did you have a look at the device tree to see what the kernel command line with respect to the UART, just wondering if it is now changed?

 

I would also make sure earlyprintk is turned on in the kernel config and the kernel command line to see if you get some more boot info out of it.

 

Thanks

John

0 Kudos
Participant btsavage
Participant
8,375 Views
Registered: ‎11-09-2015

Re: device tree help

I have attached the devicetree file.  I took the .dtb file and converted it back to a .dts file.

I am a novice with the zynq, so I'm struggling/learning as I go.

0 Kudos
Participant btsavage
Participant
8,374 Views
Registered: ‎11-09-2015

Re: device tree help

Terminal Output

 

U-Boot 2015.04 (Jul 30 2015 - 13:20:13)

Board:  Xilinx Zynq
I2C:   ready
DRAM:  ECC disabled 1 GiB
MMC:   zynq_sdhci: 0
SF: Detected S25FL128S_64K with page size 512 Bytes, erase size 128 KiB, total 32 MiB
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Board:  Xilinx Zynq
Net:   Gem.e000b000
Hit any key to stop autoboot:  0
Device: zynq_sdhci
Manufacturer ID: 3
OEM: 5344
Name: SS32G
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 29.7 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
reading uEnv.txt
** Unable to read file uEnv.txt **
Copying Linux from SD to RAM...
reading uImage
3527192 bytes read in 337 ms (10 MiB/s)
reading devicetree.dtb
10173 bytes read in 18 ms (551.8 KiB/s)
reading uramdisk.image.gz
6172273 bytes read in 581 ms (10.1 MiB/s)
## Booting kernel from Legacy Image at 02080000 ...
   Image Name:   Linux-4.0.0-xilinx-L3KEO-00076-g
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    3527128 Bytes = 3.4 MiB
   Load Address: 00008000
   Entry Point:  00008000
   Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 04000000 ...
   Image Name:
   Image Type:   ARM Linux RAMDisk Image (gzip compressed)
   Data Size:    6172209 Bytes = 5.9 MiB
   Load Address: 00000000
   Entry Point:  00000000
   Verifying Checksum ... OK
## Flattened Device Tree blob at 02000000
   Booting using the fdt blob at 0x2000000
   Loading Kernel Image ... OK
   Loading Ramdisk to 1fa1d000, end 1ffffe31 ... OK
   Loading Device Tree to 1fa17000, end 1fa1c7bc ... OK

Starting kernel ...

0 Kudos
Xilinx Employee
Xilinx Employee
8,361 Views
Registered: ‎09-10-2008

Re: device tree help

Did you get a DONE LED showing the PL loaded?

I'm assuming you created a new project in Petalinux and generated a new FSBL which incorporated the bitstream into the boot.bin. What version of Petalinux also?
0 Kudos
Participant btsavage
Participant
8,359 Views
Registered: ‎11-09-2015

Re: device tree help

We are using Ubuntu.  The OS is supplied by a customer.

 

The Done LED is lit.

0 Kudos
Participant btsavage
Participant
8,356 Views
Registered: ‎11-09-2015

Re: device tree help

Actually, I used the SDK to generate a new FSBL. Then I used the SDK pointing to the device tree repo to generate a new device tree. Could this be part of the problem?
I got the kernel, u-boot and the device tree from the GIT repo. My uramdisk file is supplied by the customer and is Ubuntu.
0 Kudos
Xilinx Employee
Xilinx Employee
8,348 Views
Registered: ‎09-10-2008

Re: device tree help

This multiple UART thing is a confusing topic that we've wrestled with in the past and there are some threads associated with it and it sounds like you went thru them.

There are lots of ways to hack on this including changing the order of the nodes for the uarts in the tree, changing the serial aliases, etc... This needs to be documented how to make this work as it's a common problem.

You do need to watch the repos and use tags for the releases so that everything is synced up (device tree, kernel, etc) , but it sounds like you are doing it right. I'm assuming you do know embedded Linux reasonably well or else you'd be using Petalinux to help with that.

You could also add something else in the PL to test your build process (like a GPIO tied to PMOD) since the multiple UARTs is confusing.

If I have time I want to go thru the multiple UARTs more to figure out the answer better.

Thanks
John
0 Kudos
Participant btsavage
Participant
8,347 Views
Registered: ‎11-09-2015

Re: device tree help

My next step was to add CAN.  Should I abandon the UARTs and work on CAN for now or will I encounter the same problems?

0 Kudos
Xilinx Employee
Xilinx Employee
8,345 Views
Registered: ‎09-10-2008

Re: device tree help

I personally would pick on the simplest interface like GPIO to get a baseline but CAN would likely be fine also. It should not suffer from the multiple instance issue and with the console like the UART. I like to start simple then add complexity as the complexity is likely hard to debug, but just my experience.
0 Kudos
Xilinx Employee
Xilinx Employee
6,504 Views
Registered: ‎09-10-2008

Re: device tree help

Did you try swapping the serial0 and 1 alias in the device tree so that the 0 points to the normal UART for Zynq (UART1)?
0 Kudos
Participant btsavage
Participant
6,498 Views
Registered: ‎11-09-2015

Re: device tree help

I swapped the serial0 and serial1 alias and it boots! Can you explain why this works?
0 Kudos
Xilinx Employee
Xilinx Employee
6,493 Views
Registered: ‎09-10-2008

Re: device tree help

Not yet, but digging in on it more.  I'll post it when I figure it out.

0 Kudos