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pedro_uno
Advisor
Advisor
567 Views
Registered: ‎02-12-2013

petalinux boot failure on picozed

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Hello

I hesitate to post this general boot failure but I have not had any success debugging it myself.  The hardware is the Avnet Picozed on the FMC carrier card.

Toward the end of the boot log there are a couple of references to ttyUSB0.  On the Picozed UART 1 is wired to the outside world.  I thought that might be the problem but u-boot seems to know which uart to use.  I checked the setting in the petalinux-config menu and it specifies uart 1.  In any case, I pass the .hdf file from my fpga build to petalinux-config so it should see that I have only uart 1 enabled.

Another thought is that there is a problem with the root filesystem.  I specified the sd card as my root filesystem. I am using the Linaro - Stretch filesystem for armhf.  In u-boot I can run ext4ls on that sd card partition and see all the OS files.

I'm not really sure how to debug this.   Is it posssible to increase the message level to get more info during boot?  What do you guys do when Petalinux fails to boot?

  Pete

 

 


U-Boot 2019.01 (Nov 14 2019 - 20:40:02 +0000) Xilinx Zynq ZC702

CPU: Zynq 7z020
Silicon: v3.1
DRAM: ECC disabled 1 GiB
MMC: mmc@e0100000: 0
Loading Environment from FAT... *** Warning - bad CRC, using default environment

In: serial@e0001000
Out: serial@e0001000
Err: serial@e0001000
Net: ZYNQ GEM: e000b000, phyaddr ffffffff, interface rgmii-id
eth0: ethernet@e000b000
U-BOOT for bspproj

ethernet@e000b000 Waiting for PHY auto negotiation to complete........ done
BOOTP broadcast 1
BOOTP broadcast 2
DHCP client bound to address 192.168.1.138 (254 ms)
Hit any key to stop autoboot: 0
Device: mmc@e0100000
Manufacturer ID: 3
OEM: 5344
Name: SL32G
Bus Speed: 25000000
Mode : SD High Speed (50MHz)
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 29.7 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
4157928 bytes read in 394 ms (10.1 MiB/s)
## Loading kernel from FIT Image at 10000000 ...
Using 'conf@system-top.dtb' configuration
Verifying Hash Integrity ... OK
Trying 'kernel@1' kernel subimage
Description: Linux kernel
Type: Kernel Image
Compression: uncompressed
Data Start: 0x10000104
Data Size: 4140776 Bytes = 3.9 MiB
Architecture: ARM
OS: Linux
Load Address: 0x00008000
Entry Point: 0x00008000
Hash algo: sha1
Hash value: ce8dc020ee4e4d41b8bbd42dec0a3fb55eb212a8
Verifying Hash Integrity ... sha1+ OK
## Loading fdt from FIT Image at 10000000 ...
Using 'conf@system-top.dtb' configuration
Verifying Hash Integrity ... OK
Trying 'fdt@system-top.dtb' fdt subimage
Description: Flattened Device Tree blob
Type: Flat Device Tree
Compression: uncompressed
Data Start: 0x103f30ec
Data Size: 15241 Bytes = 14.9 KiB
Architecture: ARM
Hash algo: sha1
Hash value: 7c540b40e3490f90be28a95eb609be50bcc41bbf
Verifying Hash Integrity ... sha1+ OK
Booting using the fdt blob at 0x103f30ec
Loading Kernel Image ... OK
Loading Device Tree to 07ff9000, end 07fffb88 ... OK

Starting kernel ...

Booting Linux on physical CPU 0x0
Linux version 4.19.0-xilinx-v2019.1 (oe-user@oe-host) (gcc version 8.2.0 (GCC)) #1 SMP PREEMPT Thu Nov 14 20:39:46 UTC 2019
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
OF: fdt: Machine model: xlnx,zynq-7000
bootconsole [earlycon0] enabled
Memory policy: Data cache writealloc
cma: Reserved 16 MiB at 0x3f000000
random: get_random_bytes called from start_kernel+0x80/0x3c4 with crng_init=0
percpu: Embedded 16 pages/cpu @(ptrval) s35916 r8192 d21428 u65536
Built 1 zonelists, mobility grouping on. Total pages: 260608
Kernel command line: console=ttyPS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 1012960K/1048576K available (6144K kernel code, 204K rwdata, 1604K rodata, 1024K init, 132K bss, 19232K reserved, 16384K cma-reserved, 245760K highmem)
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
vmalloc : 0xf0800000 - 0xff800000 ( 240 MB)
lowmem : 0xc0000000 - 0xf0000000 ( 768 MB)
pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
.text : 0x(ptrval) - 0x(ptrval) (7136 kB)
.init : 0x(ptrval) - 0x(ptrval) (1024 kB)
.data : 0x(ptrval) - 0x(ptrval) ( 205 kB)
.bss : 0x(ptrval) - 0x(ptrval) ( 133 kB)
rcu: Preemptible hierarchical RCU implementation.
rcu: RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
Tasks RCU enabled.
rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
efuse mapped to (ptrval)
slcr mapped to (ptrval)
L2C: platform modifies aux control register: 0x72360000 -> 0x72760000
L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000
L2C-310 erratum 769419 enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 ID prefetch enabled, offset 1 lines
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001
zynq_clock_init: clkc starts at (ptrval)
Zynq clock init
sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns
clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce07af025, max_idle_ns: 440795209040 ns
Switching to timer-based delay loop, resolution 3ns
clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 537538477 ns
timer #0 at (ptrval), irq=17
Console: colour dummy device 80x30
Calibrating delay loop (skipped), value calculated using timer frequency.. 666.66 BogoMIPS (lpj=3333333)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
CPU: Testing write buffer coherency: ok
CPU0: Spectre v2: using BPIALL workaround
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x100000 - 0x100060
rcu: Hierarchical SRCU implementation.
smp: Bringing up secondary CPUs ...
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
CPU1: Spectre v2: using BPIALL workaround
smp: Brought up 1 node, 2 CPUs
SMP: Total of 2 processors activated (1333.33 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
futex hash table entries: 512 (order: 3, 32768 bytes)
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
cpuidle: using governor menu
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0x(ptrval)
zynq-pinctrl 700.pinctrl: zynq pinctrl initialized
`��k����[ttyPS0] enabledat MMIO 0xe0001000 (irq = 25, base_baud = 3125000) is a xuartps
console [ttyPS0] enabled
bootconsole [earlycon0] disabled
bootconsole [earlycon0] disabled

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DSP in hardware and software
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shabbirk
Moderator
Moderator
439 Views
Registered: ‎12-04-2016

Hi @pedro_uno 

Normally kernel locks up when it is trying to access PL IP that does not exist.

If you want to disable the driver, you can do so after setting the driver node's  status property to "disabled" in device tree.

Also, on updating FPGA bit file, you can always do it later dynamically after linux boot and how does that affect if you keep the bitfile along with fsbl?

View solution in original post

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shabbirk
Moderator
Moderator
507 Views
Registered: ‎12-04-2016

Hi @pedro_uno 

A quick check, have you created BOOT.bin after appending bitfile?

 

Best Regards

Shabbir

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pedro_uno
Advisor
Advisor
448 Views
Registered: ‎02-12-2013

Shabbir,

I do not have a bitfile in my BOOT.bin. 

Normally I do not load a bit file in the FSBL.  I'm testing new fpga designs all the time. I just load them as needed from the Linux command line.

Please tell me why you ask about the bitfile.  Is there some way that not having a bitfile loaded could affect the Petalinux boot process?

    Pete

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DSP in hardware and software
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shabbirk
Moderator
Moderator
439 Views
Registered: ‎12-04-2016

Hi @pedro_uno 

Normally kernel locks up when it is trying to access PL IP that does not exist.

If you want to disable the driver, you can do so after setting the driver node's  status property to "disabled" in device tree.

Also, on updating FPGA bit file, you can always do it later dynamically after linux boot and how does that affect if you keep the bitfile along with fsbl?

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shabbirk
Moderator
Moderator
440 Views
Registered: ‎12-04-2016

Hi @pedro_uno 

Normally kernel locks up when it is trying to access PL IP that does not exist.

If you want to disable the driver, you can do so after setting the driver node's  status property to "disabled" in device tree.

Also, on updating FPGA bit file, you can always do it later dynamically after linux boot and how does that affect if you keep the bitfile along with fsbl?

View solution in original post

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pedro_uno
Advisor
Advisor
408 Views
Registered: ‎02-12-2013

That was it.  I just added the --fpga option to the petalinux-package command and now it boots all the way through.

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DSP in hardware and software
-----------------------------------------
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