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Observer obverse
Observer
1,096 Views
Registered: ‎08-24-2017

Changing Polarity of PS-GTR Transceivers

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Can the polarity of the PS-GTR transceivers be changed like the GTY and GTH transceivers? This is specifically for PCIe Gen2 x4. I'm not seeing an answer in the ZYNQ TRM UG1085.

 

Thanks,

Dave

 

 

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1 Solution

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Xilinx Employee
Xilinx Employee
1,759 Views
Registered: ‎02-26-2014

Re: Changing Polarity of PS-GTR Transceivers

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Hi,

 

I think yes,

See the register map here 

 

In SERDES module, register L0_TX_ANA_TM_13, has polarity inversion. 

https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html

 

Regards,

Ravi

 

edited to add RX polarity:

rxpolarity.JPG

 

 

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4 Replies
Xilinx Employee
Xilinx Employee
1,760 Views
Registered: ‎02-26-2014

Re: Changing Polarity of PS-GTR Transceivers

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Hi,

 

I think yes,

See the register map here 

 

In SERDES module, register L0_TX_ANA_TM_13, has polarity inversion. 

https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html

 

Regards,

Ravi

 

edited to add RX polarity:

rxpolarity.JPG

 

 

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Observer obverse
Observer
1,016 Views
Registered: ‎08-24-2017

Re: Changing Polarity of PS-GTR Transceivers

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So it looks like only the TX side of the PS-GTR transceivers can have the polarity changed. This is great information to know. Thanks for the help Ravi

 

Dave

 

 

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Adventurer
Adventurer
796 Views
Registered: ‎02-14-2009

Re: Changing Polarity of PS-GTR Transceivers

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Hi!

 

https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html

There are description only for

L0_TX_ANA_TM_18

L0_TX_ANA_TM_117

L0_TX_ANA_TM_118

 

Could you provide link for L0_TX_ANA_TM_13 description ?

 

Thanks!

 

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Visitor electrodev99
Visitor
54 Views
Registered: ‎05-07-2018

Re: Changing Polarity of PS-GTR Transceivers

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I don't see these registers in my psu_init.c or the register listing -- are they in the xczu4cg-sfvc784-1-e? I really need to be able to switch the polarity of both the RX and TX ports, but I see no way. Honestly, I thought all of this stuff was handled automatically via the lane training, but for some reason I still can't get my PCIe device to work on the integrated PS-GTR integrated PCIe block.

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