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Registered: ‎10-29-2015

Custom IP stops board booting when IO pins made external : ML507 Virtex 5

Hi,

 

I am working on Virtex 5 ML507 Board and currently devloped one IP for I2C bit banging.( Xilinx ISE 14.7)

My IP input and outputs for IP are as follows.

 

clk : in std_logic;

Reset : in std_logic;

 

scl_I : in std_logic;
scl_O : out std_logic;
scl_T : out std_logic;
sda_I : in std_logic;
sda_O : out std_logic;
sda_T : out std_logic;

 

On the wrapper there are two tri state buffers for SCL and SDA generated by tool itself.

in The Xilinx XPS, Port sections I am making SCL_IO and SDA_IO as external so that those pins will appear on top wrapper and I can assign pin for it ucf file.

 

Issue is When I am making these pins external and try to boot Uboot/Kernal, It doesnt boot.

If I keep code for IP in the project and not make external then board boots properly.

 

This is ucf file.

Net RTC_SCL_pin LOC = G32 | IOSTANDARD=LVCMOS25 | PULLUP | SLEW = FAST | DRIVE = 12 ;
Net RTC_SDA_pin LOC = H32 | IOSTANDARD=LVCMOS25 | PULLUP | SLEW = FAST | DRIVE = 12 ;

 

 

 

 

This is some patch of code where I am assigning SDA and SCL lines

 

scl_O <= '0';
sda_s <= '0' when sda_ena_n = '0' else '1';--'Z';--nimo z
sda_O <= '0';
sda_rd <= sda_I when read_slave = '1' else '0';

sda_T <= '0' when (flag = '0' and read_slave = '0' )
else '1';

scl_T <= '0' when (scl_ena = '1' and scl_clk = '0')
else '1';

 

 

Is there any issue due to current drive that stops board from booting?

 

 

Thanks in advance.

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