08-17-2017 10:13 AM
I am not familiar with the connection between the PS and PL on the Zynq ultrascale+ mpsoc.
I wonder how could I just use PL part.
My project is a pure logic design have no connection with the PS part.
After I download the bit-stream, I found there is no clock for the design.
My search result is to use the PL part ,firstly should enable the PS part.
Is it so?
Any hint will be appreciated!
08-17-2017 10:21 AM - edited 08-17-2017 10:24 AM
@mathmaxsean What is the board you are using?
We have a ZCU102 and it has several clocks available, some of them programmable.
If you want to use the PL part you just dont add the ZYNQ IP to your design, simple as that.
That said, adding the PS to the design will not cost you much in terms of area and will provide you with a handy way to generate clocks for the PL using the Zynq configuration.
For example, in the design below, I use FCLK_CLK0 from the PS to drive a microblaze.
(Granted this is for the Zybo board/Zynq7 but it is almost the same)
08-17-2017 10:23 AM
The PS is what first boots up and usually initializes the PL, but you can basically get away with a minimum there and just have the PS run system setup and nothing else.
Most likely you already have a bootloader (u-boot) installed on your board, which will do the basic initialization for you.
Hope this helps,
08-17-2017 11:58 AM
As opposed to all other FPGAs, which have a variety of means for downloading the bitstream from flash/ROM on FPGA powerup, the Zynq does not.
The only way to get a bitstream into the programmable logic (PL) of the Zynq is
- via the PCAP, which is controlled by the processor system (PS) - you must boot the PS to access this
- via JTAG
So if you want to use "only" the PL, you can download a bitstream directly into the fabric via JTAG. But that is non-permanent - every time you power up the system you will need an external PC with a JTAG programmer to bring up the FPGA.
Alternatively, the Vivado tools make it easy to create the First Stage Boot Loader (FSBL), which boots the PS with some simple code, which then downloads the bitstream into the fabric. This FSBL code (along with the bitstream) can be downloaded into flash accessed by the flash controller of the PS.
A Zynq fabric has access to clocks from two different sources. Like all other 7 series devices, there are clock capable pins that can bring in external clocks. In addition, the PS requires an external oscillator, and can provide clocks to the PL. If you are working on a development board that only has PS clocks, then you have to bring up the PS first to get the PS->PL clocks programmed and running. Again, the FSBL will do this for you...