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9,324 Views
Registered: ‎07-11-2010

How to connect AXI-Streaming with addressable AXI4?

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Hi all,

 

I'm wondering if anyone knows how to handle this... Basically, I've created and tested a nice System Generator core that incorporates the new AXI-Streaming FIFO block. So, I have a streaming interface for my IP, and I want to connect it to my XPS processor. Unfortunately I'm not able to use any of the 16 built-in AXI-Streaming interfaces, and this cannot change.

 

Basically, I have to connect my SysGen streaming IP to a regular, bursty AXI4 interface. Is there an accepted and proper way of doing this in XPS? Using the virtual FIFO controller peripheral doesn't seem to be working...

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Xilinx Employee
Xilinx Employee
10,354 Views
Registered: ‎08-02-2011

Re: How to connect AXI-Streaming with addressable AXI4?

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You probably want to look into the AXI Datamover core in EDK or AXI DMA core if you're going to memory

www.xilinx.com
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Xilinx Employee
Xilinx Employee
10,355 Views
Registered: ‎08-02-2011

Re: How to connect AXI-Streaming with addressable AXI4?

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You probably want to look into the AXI Datamover core in EDK or AXI DMA core if you're going to memory

www.xilinx.com
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9,307 Views
Registered: ‎07-11-2010

Re: How to connect AXI-Streaming with addressable AXI4?

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The datamover core is exactly what I was looking for. This will let me bridge the streaming/memory-mapped domains without having to design in DMA proper. I just wanted to read out of the streaming interface whenever it was convenient for me to take samples. Thanks so much for your help and for the reply!
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