UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Explorer
Explorer
339 Views
Registered: ‎05-31-2015

Quad Spi interrupt enabling in Zynq Ultrascale

Hello,

 

I have recently started to work in Zynq ulltrascale. I want to use QSPI0 peripheral in Zynq ultrascale board. It is connected to ARM. I want to know in which Zynq ultrascale register , at which bit I have to set the interrupt enable for QSPI. From which Xilinx datasheet can I get information regarding the register settings for QSPI in Zynq ultrascale in detail (with information regarding each bit position in register).

 

Thanks in advance

 

With Regards

Shalini

Tags (2)
0 Kudos
3 Replies
Xilinx Employee
Xilinx Employee
306 Views
Registered: ‎06-02-2017

回复: Quad Spi interrupt enabling in Zynq Ultrascale

Hi sha@hys,

 

I think the document you needed is UG1085 Zynq UltraScale+ Device Technical Reference Manual.

And for easy start your application, you are recommended from the example design the BSP provided. It also provides the qspi example with interrupt.

-------------------------------------------------------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.
--------------------------------------------------------------------------------------------------------------------------------------------
0 Kudos
Explorer
Explorer
297 Views
Registered: ‎05-31-2015

Re: Quad Spi interrupt enabling in Zynq Ultrascale

Hello
Thanks for reply.i can see quad spi peripheral setting here.but I want to see gic register for zyncq ultrascale.where can I get that.? I think I have to set for qspi enabling in GIC registers.
Thanks in advance
With regards
Shalini
0 Kudos
Xilinx Employee
Xilinx Employee
276 Views
Registered: ‎10-30-2017

Re: Quad Spi interrupt enabling in Zynq Ultrascale

Hi sha@hys,

 

 

Please check the GQSPI_IER and GQSPI_ISR registers in UG1087 (Zynq ultrascale+ MPSoC Register reference manual).

https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html

 

qspi_reg.PNG

 

Best Regards,
Srikanth
----------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.

0 Kudos