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Visitor swhaworth
Visitor
12,178 Views
Registered: ‎10-24-2007

Requirements for PPC?

Tools used: ISE 9.2.3 EDK 9.2
 
I am using a PLDA XpressFX board with a V4 FX60-11 onboard.  I have been developing well on this board using just the PLDA Lite PCIe core and the control logic I need for the project.  I have recently decided that I needed an onboard microprocessor as the host PC was not able to reliably handle the interrupt rate I need,  so I implemented a Microblaze using EDK 9.2, but to match speed with the PCIe core it has to run at 125MHz.  Unfortunately I have been unable to meet this timing, and another issue I am having with Chipscope meant that I couldn't reliably use the MDM debug interface with it either.
 
So I want to switch to using a PPC core but have been unable to get it running, I always get the following error in XPS SDK:
 
Error initializing: XMD couldn't connect to remote target.
Error::ERROR: Unable to STOP PowerPC Processor Check: (1) If the FPGA is Configured Correctly (or)  (2) If Processor Reset and Clock Ports are Connected Correctly 
JTAG chain configuration --------------------------------------------------
Device   ID Code        IR Length    Part Name 
1       f5059093          16        XCF32P 
2       21eb4093          14        XC4VFX60
Now it took me a while to set up the Microblaze system and get it running, so I am quite aware of how the clocks and resets are connecting, and that they are connected in the same manner as the working Microblaze system.  I am not sure if there is anything I need to do to ensure the FPGA is configured correctly, I have programmed it as I always do and the PCIe interface is working as usual.  I have also looked at several example PPC systems to see if there is any IP that I am missing, I had a feeling that you had to add a timer IP but I can't see this in any example systems or documentation.
 
I have attached a view of the system with all the included IP and buses.  I am doing most of my communications to the PCIe core through FSL coprocessors and these also seemed to be working ok in the Microblaze system although I hadn't finished checking them before Chipscope went funny on me.
 
So is there anything else I need, and can the PPC core run ok at 125MHz?
I am also aware that there might be design issues on the PLDA board that prevent the PPC cores from running at all, so in this case I guess I will have to go back to the Microblaze at 100MHz and using asynchronous connections to the FSL coprocessors running at 125MHz.
 
Thanks for any help
 
Steve
savppc.png
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5 Replies
Xilinx Employee
Xilinx Employee
12,174 Views
Registered: ‎08-07-2007

Re: Requirements for PPC?

Hi Steve,
 
Couple of suggestions:
1. Please double check if both of the PPC has been connected to JTAGPPC_Cntlr module so that they are both in the JTAG chain.
2. I don't see a DCM being used in your system. You might check your clock scheme.
3. Try to launch XMD from XPS rather than SDK.
 
--XF
 
 
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Visitor swhaworth
Visitor
12,170 Views
Registered: ‎10-24-2007

Re: Requirements for PPC?

1. Yeah you can see the jtag chain routing through both processors in the system from the bus view.
2. No I don't use one for this design, the clock is the same one used in the PCIe core and is generated by the MGT (encrypted VHDL, so I am not sure exactly how), but I may try a clock generator again.
3. Just did, same error.
 
Thanks for the suggestions.
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Xilinx Employee
Xilinx Employee
12,154 Views
Registered: ‎08-07-2007

Re: Requirements for PPC?

Hi,
 
It would be difficult for PLB to run at 125MHz. Not quite sure if this can cause a problem for connecting with XMD.
 
--XF
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Visitor bharaths
Visitor
9,051 Views
Registered: ‎08-12-2008

Re: Requirements for PPC?

Hi Xiaofeip,

 

In what way that can cause a problem ?

Actually i am using the same and get the same error.

But my design initially loads and i can launch XMD for once or twice then it says

Error:Unable to stop processor.

 Check 1) .....

           2) ..........

 

If so what would be the suggested Frequency?

 

 

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Explorer
Explorer
8,954 Views
Registered: ‎08-14-2007

Re: Requirements for PPC?

If you're getting the "Unable to stop processor" error, then as I like to say "your processor has gone out to lunch".

 

This can happen

 

1) if the processor is getting bombarded w/ interrupts and there is no handler for it.

2) if the processor attempted a PLB read/write that was never ACK'd (and there is no handler for it). The parentheses are because this last problem has occured once or twice with a handler as well.

3) if the processor executed invalid instructions (I'm pretty sure there's an internal INT for this as well).

 

One way of performing a sanity check on the PPC405 is do to a 'rrd' from xmd after connecting. If all the registers come back with the same value, like all of them were smeared with it, its dead. The next step to the test is to try writing to a register and making sure that the value is correctly populated in the register. If this value is smeared to every register, like the previous problem, it's dead.

 

BTW, what is the bootcode for your PPC? You do know that unlike the MB, the PPC requires a block of RAM mapped to address 0xFFFFFFFC for the reset vector. 

 

The PLB can run at 125MHz. The PPC can run at 125MHz. In fact I have designs w/ the PPC running at 300MHz. It appears the doc for the PLBv46 is missing the actual speeds in its corresponding table (table 14). From the PLBv34 and based upon the VII-Pro in -7 grade, a similar system to your (2 masters, and 4 slaves) could run at 169MHz, which is well above your requirement of 125MHz.

 

A rule of thumb is to have your PLB be a X:1 multiple of your PPC, so you have even clock divisions/requirements. 

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