UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Adventurer
Adventurer
105 Views
Registered: ‎04-16-2015

Trouble with a PS DDR on the ZCU102

Jump to solution

Hello all, 

I try to include PS DDR into project based on ZCU102,
but this port is absent in Zinq Ultra Scale+ MP SoC block.

Please suggest, how to activate PS DDR port in the Zinq Ultra Scale+ MP SoC block.

Thank you,

Best regards,
Viktor.
P.S. I used Vivado 2017.3

0 Kudos
1 Solution

Accepted Solutions
Contributor
Contributor
81 Views
Registered: ‎06-20-2018

Re: Trouble with a PS DDR on the ZCU102

Jump to solution

DDR port is not explicitly shown. 

 

 

In SDK, you are able to use DDR directly. 

 

If you need PS DDR to PL or wise versa, you need to enable one HP slave port on ZYNQ. 

0 Kudos
2 Replies
Contributor
Contributor
82 Views
Registered: ‎06-20-2018

Re: Trouble with a PS DDR on the ZCU102

Jump to solution

DDR port is not explicitly shown. 

 

 

In SDK, you are able to use DDR directly. 

 

If you need PS DDR to PL or wise versa, you need to enable one HP slave port on ZYNQ. 

0 Kudos
Adventurer
Adventurer
35 Views
Registered: ‎04-16-2015

Re: Trouble with a PS DDR on the ZCU102

Jump to solution

 


Hello,

 Thank you for your answer and excuse me for the late reply.

>If you need PS DDR to PL or wise versa, you need to enable one HP slave port on ZYNQ. 

Could you please alse give me reference to the document where it described in details?

 

Thank you,

Best regards,
Viktor.

0 Kudos