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Observer sulemanzp
Observer
3,150 Views
Registered: ‎03-12-2017

Write data to Zynq DDR from PC's PCIe

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Hi all. I am trying to send date from PC to the DDR memory connected with Zynq. Currently, I am using AXI Memory mapped PCIe IP to connect my zynq (PS + PL) based design with Windows PC. I am sending data from PC to PL Fifo by using AXI 4 Custom IP and then reading that FIFO by using PS Master AXI port and send that data back to PC via ethernet.

Now I want to send a large data of about 50MB which I can not store in FIFO. So I want to store that incoming data from PCIe IP to DDR attached with PS. 

I do not know how can I achieve this. Can I directly connect the AXI Memory Mapped PCIe Master port with 32bit GP Slave Port of Zynq IP?. (in between data comes in 32 bit format from PCIe). Or I must have to use one of the below mentioned DMAs or there is any simpler way of doing this.

 

(1) AXI Central DMA

(3) AXI DMA Engine

 

Note: I Never used DMA before;

Specs:

Vivado 2014.2.

Windows 7

PicoZed 7030 + Carrier Card Board.

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Voyager
Voyager
5,169 Views
Registered: ‎06-24-2013

Re: Write data to Zynq DDR from PC's PCIe

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Hey @sulemanzp,

 

I'm not sure I completely understand your current setup (it sounds a little bit over-complicated to me), but here is what I think I got:

  • You have a ZYNQ based PCIe card which is plugged into a Windows PC.
  • The data sent from the Windows PC goes to a FIFO and then to the AXI bus.
  • The PCIe endpoint is somehow memory mapped and can be accessed from the PS via one of the general purpose master ports.
  • Some application on the PS processes the data and sends back replies via ethernet

The problem now is that you want to send more data than the FIFO can hold, so the question is:

Can the data received via PCIe somehow be transferred into DDR memory for further processing?

If I am right so far, here is my answer:

 

Yes you can do that by utilizing one of the PL slave ports (either of the high performance, general purpose or acp) and sending the data directly into DDR memory where it can be accessed and processed from the PS application.

 

Hope this clarifies,

Herbert

-------------- Yes, I do this for fun!
5 Replies
Scholar hbucher
Scholar
3,145 Views
Registered: ‎03-22-2016

Re: Write data to Zynq DDR from PC's PCIe

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@sulemanzp  You should have a look at the DMA/Bridge Subsystem for PCI Express v3.0

https://www.xilinx.com/support/documentation/ip_documentation/xdma/v3_0/pg195-pcie-dma.pdf

 

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Observer sulemanzp
Observer
3,122 Views
Registered: ‎03-12-2017

Re: Write data to Zynq DDR from PC's PCIe

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Please correct me if I am wrong. DMA for PCI Express (PCIe) Subsystem IP does not support Zynq and I also don't think it's available in Vivado 2014.2. As I am restricted to this version because of remaining code in the project.
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Scholar hbucher
Scholar
3,120 Views
Registered: ‎03-22-2016

Re: Write data to Zynq DDR from PC's PCIe

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@sulemanzp 

I do run the DMA/Brigdge on my ZC706 board, which is Zynq 7000. 

But you are right, on 2014.2 it seems you have to stick with the 7 series integrated block. 

https://www.xilinx.com/support/answers/61087.html

But if you can, please upgrade to latest as the DMA/Bridge already incorporates all the pieces you need.

vitorian.com --- We do this for fun. Always give kudos. Accept as solution if your question was answered.
I will not answer to personal messages - use the forums instead.
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Highlighted
Voyager
Voyager
5,170 Views
Registered: ‎06-24-2013

Re: Write data to Zynq DDR from PC's PCIe

Jump to solution

Hey @sulemanzp,

 

I'm not sure I completely understand your current setup (it sounds a little bit over-complicated to me), but here is what I think I got:

  • You have a ZYNQ based PCIe card which is plugged into a Windows PC.
  • The data sent from the Windows PC goes to a FIFO and then to the AXI bus.
  • The PCIe endpoint is somehow memory mapped and can be accessed from the PS via one of the general purpose master ports.
  • Some application on the PS processes the data and sends back replies via ethernet

The problem now is that you want to send more data than the FIFO can hold, so the question is:

Can the data received via PCIe somehow be transferred into DDR memory for further processing?

If I am right so far, here is my answer:

 

Yes you can do that by utilizing one of the PL slave ports (either of the high performance, general purpose or acp) and sending the data directly into DDR memory where it can be accessed and processed from the PS application.

 

Hope this clarifies,

Herbert

-------------- Yes, I do this for fun!
Observer sulemanzp
Observer
3,105 Views
Registered: ‎03-12-2017

Re: Write data to Zynq DDR from PC's PCIe

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Hi @hpoetzl,

let me clear the FIFO part. PC write to FIFO via PCIE interface and PS read data from that FIFO and process.

PCIe_M_AXI -> S00_AXI_MY_CUSTOM_IP -> WR_DATA_FIFO

PS_M_AXI_GP0 -> S01_AXI_MY_CUSTOM_IP -> RD_DATA_FIFO

 

Yes you can do that by utilizing one of the PL slave ports (either of the high performance, general purpose or acp) and sending the data directly into DDR memory where it can be accessed and processed from the PS application.

Ok. I followed your guide and created a block design. Below is the picture please let me know if I am doing right.

Now PC will write on 0x00000000 to 0x03FFFFFF offset, the data will route to DDR in PL and once data is transferred. PS will read from the same offsets of DDR. Right? If Yes. I will build the project and test. 

Capture.PNG

address.PNG

 

 

Capture.PNG
address.PNG
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