12-12-2018 12:52 PM
I am working with the 10G Ethernet MAC IP block and the assosciated 10G Ethernet PCS/PMA. I'm attempting to perform a simple loopback between Rx and Tx. Between the m_axis_rx and s_axis_tx ports I have placed 2 FIFOs running in packet mode with 2048 words of space (plenty for the single packet test I am running). Sadly this is failing to loop the data back. I have also placed System ILA probes on these AXI stream connections, all 4 of the xgmii_* ports, and the rx/tx statistics vectors.
Now what do I see. Looking at the AXI stream going into s_axis_tx I observe what looks to be a perfectly valid transmission of data with a single clock cycle delay where the 10G Ethernet MAC block pulled TREADY low but the FIFO acted accordingly. This should be valid. Looking at the tx_statistics vector when the ready signal is HIGH I observe bit 3 set which according to Table 2-12 of pg072 implies "Asserted if the previous frame transmission was terminated due to an underrun error." Looking at xgmii_txd and txc I can see that 2 words before the transmission has finished the code FE FE FE FE... is sent which according to the docs means "ERROR". Again though looking at the AXI stream going into s_axis_tx I see the full contents of the packet with no signaling errors so I don't understand why 10G MAC has declared this packet (and every other one) as underrun.
Any advice on why this might happen would be greatly appreciated. Looking at "Aborting a Transmission" I only find problems that stem from the AXI stream and problems I do not observe in my ILA scope.
12-13-2018 08:11 AM
For any who fall into a similar problem a direct loopback between Rx and Tx is not always possible. I'm not sure why but in my 7 Series design this method functioned. When moving to UltraScale however it seems the tuser pin on tx_axis_tuser is checked more closely. I changed that pin to be hard tied to GND and all works well now.