10-28-2011 04:51 AM
Now that I have managed to get aurora IP working between FPGA boards, I now want to understand how to optimize communication with a non-aurora part.
The chief issue that I encountered in dealing with aurora was the necessity of clock correction. This IP was part of aurora and seems to be baked in the the hard GTP.
How do I handle clock compensation with a non-Xilinx device?
I have the channel up and running, but I see the same periodic errors that I was getting when my aurora links were not doing clock compensation correctly.
10-29-2011 07:35 AM
10-31-2011 10:34 AM
I read the section you suggested.
I think I understand what you are saying. The TLK2701 doesn't have any explicit clock correction feature - however it does resynchronize when it detects a comma character in the stream. I don't really know if this is usable for clock correction. As I see it, I have two options
1) Manually send clock correction sequences from the TLK2701 and periodically send commas from GTP. In this case, GTP should work, and I guess we have to hope that the TI chip does the right thing (possible).
2) Figure 7-27 of ug196 says that in a system with Separate Reference Clocks and RX uses RXRECCLK that no clock correction is needed, but that some latency penalty is incurred. Is this a worthwhile option?
Does anyone have experience with this sort of thing?
11-01-2011 08:54 AM
1) This will completely depend on how the TLK2701works
2) If you use the RXRECCLK as the source for the RXUSRCLK reads then there is no need for clock correction sequences. You will need to figure out some way to bridge between this clock domain and your TX clock domain and account for underflow/overflow conditions.
11-01-2011 09:09 AM