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Nitin1
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Registered: ‎03-14-2021

High Speed Communication switch on CoolRunner II

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Hi,

I am new on CPLD and FPGA development.

I have to make EtherCAT switch with two inputs and one output.Input selection would be based on "Physical button press" by user.

can anyone suggest if "CoolRunner II CPLD" would work for this use case or do i need some other variant of CPLD. (in light of High speed communication on I/O)

1. Two inputs of EtherCAT are running on 100Mbps. (Preferred 1Gbps - if Feasible), Input selection would be based on "User button press"

2. EtherCAT PHY would be taken care by Beckhoff Chipset.

CPLD is used only to avoid cable interchange manually.

so on each power cycle as per user button state - "EtherCAT Input" routed to "EtherCAT Output" automatically.

3. Are there any limitations on I/O for these high speed signals?

ex: Speed , voltage level

 

 

Regards

Nitin

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drjohnsmith
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Registered: ‎07-09-2009

If your switching the ethernet signals,

    you need an anlaog switch, with the required bandwidth

There are chips that might work, from the analog companies, 

   but as mentioned, a CPLD is a logic device, not analog,

     so can not be used to switch the ethernet analog signals,

 

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sandrao
Community Manager
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Registered: ‎08-08-2007

Hi @Nitin1 

 I'm not familiar with the EtherCAT but for the CPLD considerations, the dataseet for the Coolrunner-II has details on speed and voltage level : https://www.xilinx.com/support/documentation/data_sheets/ds090.pdf

sandrao_0-1615820241713.png

https://www.xilinx.com/support/documentation/data_sheets/ds096.pdf

sandrao_1-1615820377889.png

 

 

 

 

Thanks,

Sandy


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drjohnsmith
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Registered: ‎07-09-2009

Are you planning to switch the ethernet signals ? 

  if so, thee are not logic levels and you cannot switch them with a logic device ?

 

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Nitin1
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Registered: ‎03-14-2021

 Hi DrJhon,

Attached file is representation of my application.

yes i want to route ethernet Input signals to output. .. and input selection would be on basis of GPIO button sense.

Can you please suggest what would be right approach to do it in simplest way.

 

 

 

 

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joancab
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Registered: ‎05-11-2015

Isn't there an off the shelf chip to do that or is that a Uni assignment?

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Nitin1
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Registered: ‎03-14-2021

Hi Joan.

As per my knowledge Nope there is no off the shelf Chip available for this functionality.and we need this functionality in our System.

our requirement is just to avoid "manually switching cables of EtherCAT" 

we need high speed (100MBps) switching IOs with Logic Mux,which can mux Ethernet signals as per toggle button input.

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drjohnsmith
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Registered: ‎07-09-2009

If your switching the ethernet signals,

    you need an anlaog switch, with the required bandwidth

There are chips that might work, from the analog companies, 

   but as mentioned, a CPLD is a logic device, not analog,

     so can not be used to switch the ethernet analog signals,

 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>

View solution in original post

joancab
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Registered: ‎05-11-2015

"Ethernet" is a surprising protocol that has been applied with different physical layers from 10 Mb/s (10BASE-T, 1990) to 400 Gb/s (400GBASE-FR8, etc. 2017). While the higher layer protocol is similar if not the same, the physical layers have important differences. The ancient 10M and 100M used a simple NRZ modulation, but faster schemes use more complex ones, 1G uses PAM-5 modulation and 10G uses a PAM-16 modulation. Not banging ones and zeros anymore.

So first of all, I would say you may only bring (and not making sure) up to 100M Ethernet signals straight away to any FPGA/ CPLD. Even though, you may know that Ethernet cables are isolated so each pair goes through a transformer (inside the Ethernet connector, called the 'magnetics') and the other winding goes to your board. Signals from transformers tend to not show the fast edges digital chips want, so something you might need is a driver to 'square' the signals as well as limiting voltages and reducing noise.

First thing you need to clarify is what layer you are dealing with. 100M has nothing to do with 1G when looking at the PHY.

Nitin1
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Registered: ‎03-14-2021

Hi DrJohn,

Thanks! Now i am looking for Analog mux with required bandwidth.

 

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Nitin1
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Registered: ‎03-14-2021

Hi Joan,

Thanks for comprehensive reply!

Yes we will have magnetics after PHY (using Ethernet Connector ),because we have to use standard CAT-5 ethernet Cable between three boards.

Physical layer -  IEEE 802.3u standard, 100Base-TX

As @drjohnsmith suggested use of analog mux device instead of CPLD,i am looking into that.

but seems still i would need driver to 'square' the signals as well as limiting voltages and reducing noise as suggested by you.

is my understanding correct on: use analog mux instead of CPLD & use Driver chip due to magnetics in between ? 

Kindly make me correct if i missed something.

Can you suggest some Driver chip for same application purpose.I know this question is out of Xilinix forum  

 

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Nitin1
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Registered: ‎03-14-2021

Hi @drjohnsmith 

Can you suggest any analog mux switch chip for this application.

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Nitin1
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Registered: ‎03-14-2021

@drjohnsmith  , @joancab , @sandrao  Thanks for your Support!

to me it seems chip like : "MAX4890"  or "PI5L200" would be possible solutions ( I am exploring off the shelf chip instead of designing custom hardware)

 

MAX4890_ethernetAnalogSwitch.gif
aforencich
Voyager
Voyager
565 Views
Registered: ‎08-14-2013

Another option to consider is using two PHYs and then switching on the PHY-attach side, as that interface is at least digital instead of multilevel analog.  But, that Maxim part looks like it could be a very good fit. 

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drjohnsmith
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Registered: ‎07-09-2009

@aforencich 

might work having two phys and switching,

but

If you switch the PHYs in and out, I think you will have to end up initialising them,

   so you would have to tell the CPU some where that the PHY has changed and needs re initialising,

 

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